LR38581 データシートの表示（PDF） - Sharp Electronics
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コンポーネント説明
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LR38581
Sharp Electronics
LR38581 Datasheet PDF : 8 Pages
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LR38581
PIN DESCRIPTION
PIN NO. SYMBOL I/O POLARITY
PIN NAME
1 OBCP O4MA3
Optical black clamp
pulse output
2 CLP
3 PBLK
O4MA3
O4MA3
AD input signal
clamp pulse output
Pre-blanking pulse
output
4 FS
O4MA32
CDS pulse output 1
5 FCDS O4MA32
CDS pulse output 2
6 RS
7 GND
8 VDD3
9 ED0
10 ED1
11 ED2
O4MA32
S/H pulse output
–
–
ICSU3
– Ground
– Power supply
Shift register clock
–
input
ICSU3
Shift register data
–
input
ICSU3 – Strobe pulse input
12 MIR
ICU3
Mirror mode
–
selection
DESCRIPTION
A pulse to clamp the optical black signal. This pulse stays
low during the absence of effective pixels within the vertical
blanking. The polarity can be changed by PLCH (pin 39).
A pulse to clamp the AD input signal. The polarity can
be changed by PLCH (pin 39).
A pulse that corresponds to the cease period of the
horizontal transfer pulse.
A pulse to sample-hold the signal from CCD.
The polarity can be changed by PLCH (pin 39).
The output phase of FS is selected by serial data.
A pulse to clamp the feed-through level from CCD.
The polarity can be changed by PLCH (pin 39).
The output phase of FCDS is selected by serial data.
A pulse to sample-hold the signal from CDS circuit.
The polarity can be changed by PLCH (pin 39).
The output phase of RS is selected by serial data.
A grounding pin.
Supply of +3.3 V power.
An input pin for the clock of the shift register, to control
the functions of LR38581. For details, see "Serial Data
Control."
An input pin for the data of the shift register, to control
the functions of LR38581. For details, see "Serial Data
Control."
An input pin for the strobe pulse, to control the functions
of LR38581. For details, see "Serial Data Control."
An input pin to select mirror or normal image mode
L level
: Normal image mode
H level or open : Mirror image mode
MIR L (Normal mode) H or open (Mirror mode)
FH1B
∏ FH1
∏ FH2
FH2B
∏ FH2
∏ FH1
13 TST1
14 TST2
15 VDD5
16 V1
17 V2
18 V3
ICD5 –
ICD5 –
–
–
O4MA52
O4MA52
O4MA52
Test pin 1
Test pin 2
Power supply
Vertical transfer
pulse output 1
Vertical transfer
pulse output 2
Vertical transfer
pulse output 3
A test pin. Set open or to L level in the normal mode.
A test pin. Set open or to L level in the normal mode.
Supply of +5 V power.
A pulse to drive vertical CCD shift register.
Connect to ØV1 pin of CCD.
A pulse to drive vertical CCD shift register.
Connect to ØV2 pin of CCD.
A pulse to drive vertical CCD shift register.
Connect to ØV3 pin of CCD.
3
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