HN58X2402SFPI データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HN58X2402SFPI

Two-wire serial interface 2k EEPROM (256-word × 8-bit) 4k EEPROM (512-word × 8-bit)

Hitachi -> Renesas Electronics 

HN58X2402SI/HN58X2404SI

Device Address (A0, A1, A2)

UP to eight devices for 2k, four devices for 4k, can be addressed on the same bus by setting the levels on

these pins to different combinations. The levels on these pins are compared with the device address code

which are input through the SDA pin. The device is selected if the compare is successfully done. These

pins are internally pulled-down to VSS. The device read these pins as Low if unconnected. As for 4k, it is

unneccesary for the A0 pin to be connected because the corresponding device address code is used as

memory address a8.

Pin Connections for A0 to A2

Pin connection

Max connect

Memory size number

A2

A1

A0

Notes

2k bit

8

VCC/VSS*1 VCC/VSS VCC/VSS

4k bit

4

VCC/VSS VCC/VSS ×*2

Use A0 for memory address a8

Notes: 1. “VCC/VSS” means that the device address pins are connected to VCC or VSS. These pins are VSS if

unconnected.

2. × = Don’t care (Open is also approval.)

Write Protect (WP)

When the Write Protect pin (WP) is high, the write protections feature is enabled and operates as shown in

the following table. When the WP is low, write operations for all memory array are allowed. The read

operation is always activated irrespective of the WP pin status. The WP pin is internally pull-down to VSS.

Write operations for all memory array are allowed if unconnected.

Write Protect Area

WP pin status

VIH

VIL

Write protect area

2k bit

Entire (2k bit)

Normal read/write operation

4k bit

Entire (4k bit)

8

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