LT1534 データシートの表示（PDF） - Linear Technology

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LT1534

Ultralow Noise 2A Switching Regulators

Linear Technology 

LT1534/LT1534-1

PIN FUNCTIONS (LT1534/LT1534-1)

COL (Pins 2, 15/Pin 2): These two pins should be con-

nected together externally to create the collector of the

power switch. The emitter returns to PGND through a

sense resistor. Large currents flow into these pins so it is

desirable to keep external trace lengths short to minimize

radiation.

SYNC (Pin 4): The SYNC pin can be used to synchronize

the oscillator to an external clock (see Oscillator Sync in

Applications Information section for more details). The

SYNC pin may either be floated or tied to ground if not

used.

CT (Pin 5): The oscillator capacitor pin is used in

conjunction with RT to set the oscillator frequency.

For RT = 16.9k,

CT(NF) = 129/fOSC(kHz)

RT (Pin 6): The oscillator resistor pin is used to set the

charge and discharge currents of the oscillator capacitor.

The nominal value is 16.9k. It is possible to adjust this

resistance ±25% to get a more accurate oscillator fre-

quency.

FB (Pin 7): The feedback pin is used for positive voltage

sensing and oscillator frequency shifting during start-up

and short-circuit conditions. It is the inverting input to the

error amplifier. The noninverting input of this amplifier

connects internally to a 1.25V reference. This pin should

be left open if not used.

NFB (Pin 8/Pin 10): The negative voltage feedback pin is

used for sensing a negative output voltage. The pin is

connected to the inverting input of the negative feedback

amplifier through a 100k source resistor. The negative

feedback amplifier provides a gain of – 0.5 to the feedback

amplifier; therefore, the nominal regulation point is – 2.5V

on NFB. This pin should be left open if not used.

GND (Pin 9/Pins 1, 8, 9, 16): Signal Ground. The internal

error amplifier, negative feedback amplifier, oscillator,

slew control circuitry and the bandgap reference are

referred to this ground. Keep the connection to the feed-

back divider and VC compensation network free of large

ground currents.

VC (Pin 10/Pin 11): The compensation pin is used for

frequency compensation and current limiting. It is the

output of the error amplifier and the input of the current

comparator. Loop frequency compensation can be per-

formed with an RC network connected from the VC pin to

ground.

SHDN (Pin 11/Pin 12): The shutdown pin is used for

disabling the switcher. Grounding this pin will disable all

internal circuitry. Normally this output can be tied high (to

VIN) or may be left floating.

RCSL (Pin 12/Pin 13): A resistor to ground sets the current

slew rate for the power switch. The minimum resistor

value is 3.9k and the maximum value is 68k. Current slew

will be approximately:

ISLEW(A/µs) = 33/RCSL(kΩ)

RVSL (Pin 13/Pin 14): A resistor to ground sets the voltage

slew rate for the power switch collector. The minimum

resistor value is 3.9k and the maximum value is 68k.

Voltage slew will be approximately:

VSLEW(V/µs) = 220/RVSL(kΩ)

VIN (Pin 14/Pin 15): Input Supply Pin. Bypass this pin with

a ≥ 4.7µF low ESR capacitor. When VIN is below 2.55V the

part will go into undervoltage lockout where it will stop

output switching and pull the VC pin low.

PGND (Pin 16/Pin 3): Power Switch Ground. This ground

comes from the emitters of the power switches. In normal

operation this pin should have approximately 25nH induc-

tance to ground. This can be done by trace inductance

(approximately 1") or with wire or a specific inductive

component (e.g., small ferrite bead). This inductance

ensures stability in the current slew control loop during

turn-off. Too much inductance (>50nH) may produce

oscillation on the output voltage slew edges.

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