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YSS906 データシートの表示(PDF) - Yamaha Corporation

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YSS906
Yamaha
Yamaha Corporation Yamaha
YSS906 Datasheet PDF : 12 Pages
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YSS906
DESCRIPTION OF PIN FUNCTION
Pin name (Pin No.) Function
1. WL (1)
WR (4)
Left channel Wide Surround input
Right channel Wide Surround input
The Wide Surround effect is obtained by inputting the signal from FOL(No.2) and FOR(No.5)
to WL and WR respectively after adjusting their output levels.
2. FOL (2) Left channel filter output
FOR (5) Right channel filter output
Refer to the above section.
3. FCL (3)
FCR (6)
Left channel filter capacitor connection
Right channel filter capacitor connection
A capacitor of 0.018 mF is to be connected between each of FCL to Ground and FCR to
Ground.
4. SC2 (7)
SC1 (8)
pseudo-stereophonic filter capacitor connection
pseudo-stereophonic filter capacitor connection
A capacitor of 0.047 mF is to be connected between SC1 and Ground.
A capacitor of 0.0082 mF is to be connected between SC2 and Ground.
5. AIL(9)
AIR(10)
Left channel analog signal input
Right channel analog signal input
Left channel signal is to be inputted to AIL through a capacitor of 10 mF.
Right channel signal is to be inputted to AIR through a capacitor of 10 mF.
6. SW(11)
Stereophonic/monaural selection, Wide Surround and Tone Control
A lead of the three resistors, 50 kW, 100 kW and 200 kW, is to be connected to this pin, and the
other end of the parts is connected to either AVDD or AVSS to ON/OFF the function.
When 50 kW, 100 kW and/or 200 kW resistor is connected to AVDD, stereophonic / monaural
selection, Wide Surround and/or Tone Control is enabled respectively, or when connected to
AVSS, these functions are disabled accordingly.
7. AVDD(12) Power supply
This pin applies voltage between +3.0 V and +5.5 V DC inclusive with respect to the potential
of AVSS. A capacitor of 10 mF is to be connected between this pin and AVSS(13).
8. AVSS(13) Ground Provides a reference for AVDD and analog signal.
9. VREF(14)
Operating voltage
Outputs a voltage that is equal to the difference between the potentials at AVDD and AVSS
divided by 2, or (AVDD - AVSS)/2, that is used as a reference voltage for the internal circuit of
this LSI. A capacitor of 10 mF is to be connected between this pin and AVSS(13).
10. AOR(15)
AOL(18)
Right channel analog signal output
Left channel analog signal output
A capacitor is to be connected to AOR and AOL pins before outputting analog signals.
11. TBR(16) and TAR(17) Right channel tone control input
TBL(19) and TAL(20) Left channel tone control input
Right channel tone control circuit is formed by connecting AOR(15), TBR(16) and TA
R(17) pins through a circuit that includes capacitors and resistors.
Left channel tone control circuit is formed by connecting AOL(18), TBL(19) and TAL(20) pins
through a circuit that includes capacitors and resistors.
(Refer to the example of application presented in the next page.)
-3-

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