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CA723C データシートの表示(PDF) - Intersil

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CA723C Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
CA723, CA723C
Typical Application Circuits (Continued)
VREF
R4
3k
R1
D1
NON
12V
SK3062
INV.
INPUT
R3
3k
R2
R5
3.9k
V+
VC
VO
VI = 85V
VZ
TI
2N3442
CURRENT
LIMIT
RSCP
1
CURRENT
SENSE
INV.
INPUT
V-
COMP
C1
0.001µF
Circuit Performance Data:
REGULATED
OUTPUT-50V
Line Regulation (V = 20V) 15mV
Load Regulation (IL = 50mA) 20mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
FIGURE 26. POSITIVE FLOATING REGULATOR CIRCUIT
R5
10k
V+
VC
VI
R2
D1
12V
SK3062
R1
VREF
R3
3k
NON
INV.
INPUT
R4
3k
VO
R6
10k
VZ
TI
2N6211
CURRENT
LIMIT
CURRENT
SENSE
INV.
INPUT
C1
V-
0.001µF
COMP
REGULATED
OUTPUT-100V
Circuit Performance Data:
Line Regulation (VI = 20V) 30mV
Load Regulation (IL =100mA) 20mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
FIGURE 27. NEGATIVE FLOATING REGULATOR CIRCUIT
VI
VREF
V+ VC
VO RSCP NOTE 2
REGULATED
OUTPUT 5V
R1
CURRENT
LIMIT
CURRENT
SENSE
NON
R2 INV
INPUT V-
INV.
COMP INPUT R3
C1
0.001µF
2kTI
2N3053
R4
2.k
CCSL
LOGIC
INPUT
Circuit Performance Data:
Line Regulation (VI = 3V) 0.5mV
Load Regulation (IL = 50mA) 1.5mV
Short Circuit Current 20mA
NOTE: 1. A current limiting transistor may be used for shutdown if
current limiting is not required.
2. Add a diode if VO > 10V.
FIGURE 28. REMOTE SHUTDOWN REGULATOR CIRCUIT
WITH CURRENT LIMITING
V+
VREF
R1
INV
R2 INPUT V-
VC
VO R3
VZ 100
C
CURRENT LIMIT
CURRENT SENSE
NON INV.
COMP INPUT
C1
0.005µF
VI
R4
100
REGULATED
OUTPUT 5V
Circuit Performance Data:
Line Regulation (VI = 10V) 0.5mV
Load Regulation (IL = 100mA) 1.5mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode
should be connected in series with VO (terminal 6).
FIGURE 29. SHUNT REGULATOR CIRCUIT
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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