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TSH113ID(2002) データシートの表示(PDF) - STMicroelectronics

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コンポーネント説明
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TSH113ID
(Rev.:2002)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TSH113ID Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TSH110-TSH111-TSH112-TSH113-TSH114
ELECTRICAL CHARACTERISTICS (pages 5 and 6)
Dual Supply Voltage, VCC=±6Volts, R*fb = 680, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
TestCondition
Min. Typ. Max.
DC PERFORMANCE
Vio Input Offset Voltage
Tamb
Tmin. < Tamb < Tmax.
-1.0 0.9 3.0
1.3
Vio Input Offset Voltage Drift vs Temperature Tmin. < Tamb < Tmax.
5
Iib+ Non Inverting Input Bias Current
Tamb
Tmin. < Tamb < Tmax.
-12
1
14
1.7
Iib - Inverting Input Bias Current
Tamb
Tmin. < Tamb < Tmax.
-4
3
10
3.4
ROL Transimpedance
RL=100
600 900
ICC Supply Current per Operator
Tamb
Tmin. < Tamb < Tmax.
4
5
4.1
CMR
Common Mode Rejection Ratio
(Vic/Vio)
58 63
SVR
Supply Voltage Rejection Ratio
(Vcc/Vio)
72 80
PSR
Power Supply Rejection Ratio
(Vcc/Vout)
Gain=1, Rload=3.9k
49
DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS
Voh High Level Output Voltage
Tamb
RL = 100
Tmin. < Tamb < Tmax.
RL = 100
4.5 4.7
4.6
Vol Low Level Output Voltage
Tamb
RL = 100
Tmin. < Tamb < Tmax.
RL = 100
-4.7 -4.3
-4.6
| Isink | Output Sink current
Tmin. < Tamb < Tmax.
47
Isource Output Source current
Tmin. < Tamb < Tmax.
46
Vout=1Vpk, Rfb*=680//2pF
Bw -3dB Bandwidth
Load=100
AVCL=+2
100
SR Slew Rate
AVCL=+2, 6V step
Load=100
240 450
Tr Rise Time
Tf Fall Time
Ov Overshoot
St Settling Time @ 0.05%
for 200mV step
AVCL=+2, Rfb*=680//2pF
Load=100
10.4
12.2
17
40
G Differential gain
∆φ Differential phase
AVCL=+2, RL=100
F=4.5MHz, Vout=2Vpeak
0.05
0.05
Unit
mV
mV
µV/°C
µA
µA
µA
µA
k
mA
mA
dB
dB
dB
V
V
V
V
mA
mA
MHz
V/µs
ns
ns
%
ns
%
°
5/19

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