RMLA3565A-58(2002) データシートの表示（PDF） - Raytheon Company
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RMLA3565A-58 Datasheet PDF : 8 Pages
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RMLA3565A-58
Wideband Low Noise MMIC Amplifier
Application
Information
Figure 1
Package Outline and
Pin Designations
PRODUCT INFORMATION
CAUTION: THIS IS AN ESD SENSITIVE DEVICE
The following briefly describes a procedure for evaluating the high efficiency PHEMT amplifier packaged in a
surface mount package. It may be noted that the chip is a fully monolithic single ended two stage amplifier for 3.5
to 6.5 GHz applications.
Test Fixture
Figure 1 shows the outline and pin-out descriptions for the packaged device. Figure 2 shows the functional block
diagram of the packaged product. A typical test fixture schematic showing external bias components is shown in
Figure 3. Figure 4 shows typical layout of an evaluation board corresponding to the schematic diagram. Typical
performance of the test fixture is shown in the performance data section. The following should be noted:
(1) Package pin designations are shown in figure 1.
(2) Vd is the drain voltage (positive) applied at the pins of the package.
(3) Vdd is the positive supply voltage at the evaluation board terminal.
Dimensions in inches
TOP VIEW
0.200 SQ.
654
BOTTOM VIEW
4 56
7
8
0.030
9
10 1112
PLASTIC LID
0.008
0.015
0.282
0.015
3
3
2
2
0.020 1
1
0.011
0.075 MAX.
SIDE SECTION
7
8
9
12 11 10
0.041
Pin# Description
1 N/C
2 RF Out
3 GND
4 N/C
5 GND
6 N/C
7 GND
8 RF In
9 N/C
10 N/C
11 N/C
12 Vd
13 GND
(Package Base)
Figure 2
Functional Block
Diagram
Ground
Pins# 3,5,7,13
Ground
Pin# 5
N/C
1,4,6,9,10,11
(Recommend grounding
externally to PC board)
Ground
Pin# 7
RF IN
Pin# 8
RF OUT
Pin# 2
www.raytheonrf.com
Vd
Pin# 12
Characteristic performance data and specifications are subject to change without notice.
Revised March 28, 2002
Page 2
Raytheon RF Components
362 Lowell Street
Andover, MA 01810
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