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CXA2060BS データシートの表示(PDF) - Sony Semiconductor

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CXA2060BS
Sony
Sony Semiconductor Sony
CXA2060BS Datasheet PDF : 54 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin
No.
Symbol
15
VM OUT/
V PROT
Equivalent circuit
1k
147
15
1k
500
16 REG
16
4.4k
CXA2060BS
Description
Output of luminance signal differential
waveform for VM (Velocity Modulation).
The phase of VM output is synchronized
to the phase of RGB output.
It is approximately 250ns ahead of RGB
output.
This pin is also used for V protect signal
input. When the large current (4mA) is
forcibly drawn through this pin, all RGB
output is blanked, and 1 is output to the
status register VNG.
Decoupling capacitance for the regulator
within the IC.
The 47µF capacitor is connected to GND.
17 SCP
147
17
25k
50µA
Sand castle pulse output.
The sand castle pulse is a waveform
superimposed with the burst gate pulse on
the composite blanking pulse.
18 HP/PROTECT
H deflection pulse input for H AFC.
The 5Vp-p pulse is input via a capacitor.
Since this pin is also used to input an X-
147 10k
60k
18
96k
RAY protect signal, a hold down function
activates if this pin's voltage goes above a
"7V cycle" and below 1V. If this occurs,
HD output goes high impedance, RGB
output is blanked, and 1 is output to the
50µA
100µA status register HNG. It is necessary to
turn the IC's power OFF then ON again to
cancel this status.
–7–

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