FT232BM データシートの表示（PDF） - Future Technology

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FT232BM

USB UART ( USB - Serial) I.C.

Future Technology 

3.0 Block Diagram (Simplified)

FT232BM USB UART ( USB - Serial) I.C.

VCC

3V3OUT

PWRCTL

3.3 Volt

LDO

Regulator

SLEEP#

PWREN#

Dual Port TX

Buffer

128 bytes

48MHz

USBDP

USBDM

USB

Transceiver

Serial Interface

Engine

( SIE )

USB

Protocol Engine

UART

FIFO Controller

Baud Rate

Generator

UART

TXD

RXD

RTS#

CTS#

DTR#

DSR#

DCD#

RI#

TXDEN

USB DPLL

XTOUT

XTIN

6MHZ

Oscillator

x8 Clock

Multiplier

Dual Port RX

Buffer

384 Bytes

48MHz

12MHz RESET#

3V3OUT

RESET

GENERATOR

EEPROM

Interface

TXLED#

RXLED#

EECS

EESK

EEDATA

RSTOUT#

TEST

GND

3.1 Functional Block Descriptions

• 3.3V LDO Regulator

and two single ended receivers provide USB data

The 3.3V LDO Regulator generates the 3.3 volt

in, SEO and USB Reset condition detection.

reference voltage for driving the USB transceiver

cell output buffers. It requires an external

• USB DPLL

decoupling capacitor to be attached to the 3V3OUT

The USB DPLL cell locks on to the incoming NRZI

regulator output pin. It also provides 3.3V power to

USB data and provides separate recovered clock

the RSTOUT# pin. The main function of this block

and data signals to the SIE block.

is to power the USB Transceiver and the Reset

Generator Cells rather than to power external logic. • 6MHz Oscillator

However, external circuitry requiring 3.3V nominal

The 6MHz Oscillator cell generates a 6MHz

at a current of not greater than 5mA could also

reference clock input to the x8 Clock multiplier from

draw its power from the 3V3OUT pin if required.

an external 6MHz crystal or ceramic resonator.

• USB Transceiver

The USB Transceiver Cell provides the USB 1.1 /

USB 2.0 full-speed physical interface to the USB

cable. The output drivers provide 3.3 volt level slew

rate control signalling, whilst a differential receiver

DS232B Version 1.8 © Future Technology Devices Intl. Ltd. 2005

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