S24CS02A データシートの表示（PDF） - Unspecified

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S24CS02A

(S-24CS0xA) 2-Wire CMOS Serial EPROM

Unspecified 

FOR AUTOMOTIVE 105°C OPERATION 2-WIRE SERIAL E2PROM

S-24CS01A/02A/04A H Series

3. Data transmission

Changing the SDA line while the SCL line is low, data is transmitted.

Changing the SDA line while the SCL line is high, a start or stop condition is recognized.

tSU.DAT

tHD.DAT

Rev.3.1_03

SCL

SDA

Figure 9 Data Transmission Timing

4. Acknowledge

The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down the SDA

line to acknowledge the receipt of the 8-bit data.

When an internal write cycle is in progress, the device does not generate an acknowledge.

SCL

(E2PROM Input)

1

SDA

(Master Output)

8

9

SDA

(E2PROM Output) Start Condition

Figure 10 Acknowledge Output Timing

Acknowledge

Output

tAA

tDH

10

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