AD9608 データシートの表示（PDF） - Analog Devices
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AD9608 Datasheet PDF : 40 Pages
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AD9608
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)1
Integral Nonlinearity (INL)1
MATCHING CHARACTERISTIC
Offset Error
Gain Error
TEMPERATURE DRIFT
Offset Error
Gain Error
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Load Regulation Error at 1.0 mA
INPUT REFERRED NOISE
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF = 1.0 V
Input Capacitance2
Input Resistance (Differential)
Input Common-Mode Voltage
Input Common-Mode Range
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
I1
AVDD
I1
DRVDD
(1.8
V
CMOS)
I1
DRVDD
(1.8
V
LVDS)
POWER CONSUMPTION
DC Input
Sine Wave Input1 (DRVDD = 1.8 V CMOS Output Mode)
Sine Wave Input1 (DRVDD = 1.8 V LVDS Output Mode)
Standby Power3
Power-Down Power
Temp Min
Full 10
Full
Full −1.0
Full −2.8
Full
25°C
Full
25°C
Full
Full
Full
Full
Full 0.98
Full
25°C
Full
Full
Full
Full
Full 0.5
Full 1.7
Full 1.7
Full
Full
Full
Full
Full
Full
Full
Full
AD9608-105
Typ
Max
Guaranteed
−0.3
+0.4
±1.5
+9.0
±0.35
±0.12
±0.40
±0.14
±0.1
±1.0
±0.5
±6.5
±2
±50
1.00
1.02
2
0.08
2
5
7.5
0.9
1.3
1.8
1.9
1.8
1.9
76.8
82.0
14.7
48.5
125
165
174
226
108
2.0
AD9608-125
Min
Typ
Max Unit
10
Bits
Guaranteed
−1.0
−0.3
+0.4 % FSR
−2.8
±1.5
+9.0 % FSR
±0.35 LSB
±0.13
LSB
±0.40 LSB
±0.14
LSB
±0.1
±1.0 % FSR
±0.5
±6.5 % FSR
±2
ppm/°C
±50
ppm/°C
0.98
1.00
2
1.02 V
mV
0.08
LSB rms
2
5
7.5
0.9
0.5
V p-p
pF
kΩ
V
1.3
V
1.7
1.8
1.7
1.8
1.9
V
1.9
V
87.7
93.0 mA
17.4
mA
49.7
mA
141
mW
189
199
mW
247
mW
120
mW
2.0
mW
1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
2 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
3 Standby power is measured with a dc input and with the CLK± pins active (1.8 V CMOS mode).
Rev. 0 | Page 4 of 40
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