MT6323A/A データシートの表示（PDF） - MediaTek Inc
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MT6323A/A Datasheet PDF : 14 Pages
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Symbol
A12 VCDT
A13 VBAT_VPA
A14 VPA
A2 SRCLKEN
A3 XIN
A4 XOUT
A5 DVDD18_IO
A7 INT
A8 DVDD18_DIG
A9 FSOURCE
B1 AUXADC_AUXIN_GPS
B10 GND_ISINK
B12 VPROC_FB
B14 VPA
B2 AVSS28_AUXADC
B5 SIM1_AP_SCLK
B6 AUD_MISO
B7 SPI_CSN
B8 SPI_MISO
C10 ISINK3
C12 GND_VPROC_FB
C14 VPROC
C2 AUXADC_VREF18
C3 AVDD33_RTC
C4 RTC_32K2V8
C5 SIM2_AP_SCLK
C9 ISINK1
D1 AU_VIN2_N
D12 VPA_FB
D14 VPROC
D2 AU_VIN2_P
MT6323
PMIC Technical Brief
Confidential A
I/O
I
PWR
O
I
I
I
PWR
O
PWR
PWR
I
GND
I
O
GND
I
O
I
IO
O
I
O
O
PWR
O
I
O
I
I
O
I
Description
Fractional charger input voltage for charger
detection
Battery power supply input of VPA
SW node of VPA
26MHz CLK enable
1. One of 32K crystal connection port while
using crystal to generate 32kHz clock
2. Tie to ground with 32kHz crystal absence
1. One of 32K crystal connection port while
using crystal to generate 32kHz clock
2. External 32kHz clock input with 32kHz
crystal absence
Power of VIO18 IO/CORE
Default: Output 0
Interrupt to BB, high active
Power of VDIG18
EFUSE power source
AUXADC input
GND for ISINK
Feedback of VPROC
SW node of VPA
GND for AUXADC
AP/PMIC SIM1 clock
Uplink AUDIO ADC serial data
SPI interface's chip select signal to identify
which device is selected
SPI interface's serial data signal. Default is
output only.
Current sink channel 3 output
Remote sense on ground of VPROC
SW node of VPROC
1.8V AUXADC reference output
RTC LDO output. Supply of RTC macro where
backup battery can be added.
RTC domain 32kHz clock output
AP/PMIC SIM2 clock
Current sink channel 1 output
Analog input 3 negative
Feedback of VPA
SW node of VPROC
Analog input 3 positive
MediaTek Confidential
© 2013 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Page 7 of 14
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