TC850 データシートの表示（PDF） - TelCom Semiconductor Inc => Microchip
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TC850 Datasheet PDF : 14 Pages
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15-BIT, FAST-INTEGRATING CMOS
ANALOG-TO-DIGITAL CONVERTER
1
TC850
Integration Capacitor
The integration capacitor should be selected to produce
an integrator swing of ≈4V at full scale. The capacitor value
is easily calculated:
C = VFS • 4 • 256 ,
RINT 4V • fCLOCK
where fCLOCK is the crystal or external oscillator frequency
and VFS is the maximum input voltage.
The integration capacitor should be selected for low
dielectric absorption to prevent roll-over errors. A polypro-
pylene, polyester or polycarbonate dielectric capacitor is
recommended.
Reference Capacitors
The reference capacitors require a low leakage dielec-
tric, such as polypropylene, polyester or polycarbonate. A
value of 1µF is recommended for operation over the tem-
perature range. If high-temperature operation is not re-
quired, the CREF values can be reduced.
Auto-Zero Capacitors
Five capacitors are required to auto-zero the input
buffer, integrator amplifier, and comparator. Recommended
capacitors are 0.1µF film dielectric (such as polyester or
polypropylene). Ceramic capacitors are not recommended.
DIGITAL SECTION APPLICATION
Oscillator
The TC850 may operate with a crystal oscillator. The
crystal selected should be designed for a Pierce oscillator,
such as an AT-cut quartz crystal. The crystal oscillator
schematic is shown in Figure 6.
Since low frequency crystals are very large and ceramic
resonators are too lossy, the TC850 clock should be derived
from an external source, such as a microprocessor clock.
The clock should be input on the OSC1 pin and no connec-
tion should be made to the OSC2 pin. The external clock
should swing between DGND and VDD.
Since oscillator frequency is ÷ 4 internally and each
conversion requires 1280 internal clock cycles, the conver-
sion time will be:
Conversion time = fCLOCK × 4 × 1280.
An important advantage of the integrating ADC is the
ability to reject periodic noise. This feature is most often
used to reject line frequency (50Hz or 60Hz) noise. Noise
rejection is accomplished by selecting the integration period
equal to one or more line frequency cycles. The desired
clock frequency is selected as follows:
TELCOM SEMICONDUCTOR, INC.
fCLOCK = fNOISE × 4 × 256,
2 where fNOISE is the noise frequency to be rejected, 4 repre-
sents the clock divider, and 256 is the number of integrate
cycles.
For example, 60Hz noise will be rejected with a clock
frequency of 61.44kHz, giving a conversion rate of 12
conversions/sec. Integer submultiples of 61.44kHz (such as
30.72kHz, etc.) will also reject 60Hz noise. For 50Hz noise
3 rejection, a 51.2kHz frequency is recommended.
If noise rejection is not important, other clock frequen-
cies can be used. The TC850 will typically operate at
conversion rates ranging from 3 to 40 conversions/sec,
corresponding to oscillator frequencies from 15.36kHz to
204.8kHz.
TC850
10 MΩ
÷4
SYSTEM
4
CLOCK
17 61.44 kHz
18
100 pF
100 pF
5
Figure 6. Crystal Oscillator Schematic
Data Bus Interfacing
The TC850 provides an easy and flexible digital inter-
6 face. A 3-state data bus and six control inputs permit the
TC850 to be treated as a memory device, in most applica-
tions. The conversion result can be accessed over an 8-bit
bus or via a µP I/O port.
A typical µP bus interface for the TC850 is shown in
Figure 7. In this example, the TC850 operates in the demand
mode, and conversion begins when a write operation is
performed to any decoded address space. The BUSY
output interrupts the µP at the end-of-conversion.
7 The A/D conversion result is read as three memory
bytes. The two LSBs of the address bus select high/low byte
and overrange/polarity bit data, while high-order address
lines enable the CE input.
Figure 8 shows a typical interface to a µP I/O port or
single-chip µC. The TC850 operates in the continuous
mode, and can either interrupt the µC/µP or be polled with an
input pin.
8
3-87
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