TDA7498MV データシートの表示（PDF） - Unspecified

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TDA7498MV

100 W mono BTL class-D audio amplifier

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Contents

Contents

TDA7498MV

1 Device block diagram...................................................................... 5

2 Pin description ................................................................................ 6

2.1 Pinout ................................................................................................ 6

2.2 Pin list ............................................................................................... 7

3 Electrical specifications.................................................................. 8

3.1 Absolute maximum ratings ................................................................ 8

3.2 Thermal data ..................................................................................... 8

3.3 Recommended operating conditions................................................. 8

3.4 Electrical specifications ..................................................................... 9

4 Characterization curves ................................................................ 11

4.1 Test board ....................................................................................... 11

4.2 Characterization curves .................................................................. 12

4.2.1

4.2.2

For RL = 6 Ω...................................................................................... 12

For RL = 8 Ω...................................................................................... 14

5 Application information ................................................................ 16

5.1 Application circuit ............................................................................ 16

5.2 Mode selection ................................................................................ 17

5.3 Gain setting ..................................................................................... 18

5.4 Input resistance and capacitance.................................................... 18

5.5 Internal and external clocks ............................................................ 19

5.5.1 Master mode (internal clock) ............................................................ 19

5.5.2 Slave mode (external clock) ............................................................. 19

5.6 Output low-pass filter ...................................................................... 20

5.7 Protection functions......................................................................... 20

5.8 Diagnostic output ............................................................................ 21

6 Package information ..................................................................... 22

6.1 PowerSSO-36 EPU package information........................................ 22

7 Revision history ............................................................................ 25

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DocID016505 Rev 6

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