K4S560432J データシートの表示（PDF） - Samsung
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K4S560432J Datasheet PDF : 15 Pages
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K4S560432J
K4S560832J
K4S561632J
Synchronous DRAM
11.0 DC Characteristics (x4, x8) (Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
IO = 0 mA
Page burst
ICC4 4banks Activated.
tCCD = 2CLKs
Version
75
70
2
2
15
10
5
5
28
20
110
Unit Note
mA
1
mA
mA
mA
mA
mA
mA
1
Refresh current
Self refresh current
ICC5 tRC ≥ tRC(min)
ICC6 CKE ≤ 0.2V
160
mA
2
C
3
mA
3
L
1.5
mA
4
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S5604(08)32J-UC
4. K4S5604(08)32J-UL
5. Unless otherwise noticed, input swing level is CMOS(VIH /VIL=VDDQ/VSSQ).
9 of 15
Rev. 1.22 August 2008
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