K9XXG08UXD データシートの表示（PDF） - Samsung

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K9XXG08UXD

4G x 8 Bit/ 8G x 8 Bit/ 16G x 8 Bit NAND Flash Memory

Samsung 

K9HCG08U1D K9PDG08U5D

K9LBG08U0D K9MDG08U5D

Preliminary

FLASH MEMORY

4G x 8 Bit/ 8G x 8 Bit/ 16G x 8 Bit NAND Flash Memory

PRODUCT LIST

Part Number

K9LBG08U0D-P

K9HCG08U1D-P

K9MDG08U5D-P

K9HCG08U1D-I

K9PDG08U5D-L

Vcc Range

2.7V ~ 3.6V

Organization

x8

PKG Type

TSOP1

TSOP1-DSP

52TLGA

52TLGA(14x18)

FEATURES

• Voltage Supply

- 3.3V Device : 2.7V ~ 3.6V

• Organization

- Memory Cell Array : (2G + 109M) x 8bit

- Data Register : (4K + 218) x 8bit

• Automatic Program and Erase

- Page Program : (4K + 218)Byte

- Block Erase : (512K + 27.25K)Byte

• Page Read Operation

- Page Size : (4K + 218)Byte

- Random Read : 60µs(Max.)

- Serial Access : 30ns(Min.)

*K9XDG08U5D: 50ns(Min.)

• Memory Cell : 2bit / Memory Cell

• Fast Write Cycle Time

- Program time : 800µs(Typ.)

- Block Erase Time : 1.5ms(Typ.)

• Command/Address/Data Multiplexed I/O Port

• Hardware Data Protection

- Program/Erase Lockout During Power Transitions

• Reliable CMOS Floating-Gate Technology

- Endurance : TBD Cycles(with TBD ECC)

- Data Retention : TBD Years

• Command Register Operation

• Unique ID for Copyright Protection

• Package :

- K9LBG08U0D-PCB0/PIB0 : Pb-FREE PACKAGE

48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)

- K9HCG08U1D-PCB0/PIB0 : Pb-FREE PACKAGE

48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)

- K9MDG08U5D-PCB0/PIB0: Two K9HCG08U1D packages stacked

48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) : Pb-FREE PACKAGE

- K9HCG08U1D-ICB0/IIB0

52 - Pin TLGA (12 x 17 / 1.00 mm pitch)

- K9PDG08U5D-LCB0/LIB0 : Pb/Halogen-FREE PACKAGE

52 - Pin TLGA (14 x 18 / 1.00 mm pitch)

GENERAL DESCRIPTION

Offered in 4Gx8bit, the K9LBG08U0D is a 32G-bit NAND Flash Memory with spare 1,744M-bit. The device is offered in 3.3V Vcc. Its

NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed

in typical 800µs on the 4,314-byte page and an erase operation can be performed in typical 1.5ms on a (512K+27.25K)byte block.

Data in the data register can be read out at 30ns(K9XDG08U5D: 50ns) cycle time per byte. The I/O pins serve as the ports for

address and data input/output as well as command input. The on-chip write controller automates all program and erase functions

including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take

advantage of the K9LBG08U0D′s extended reliability of TBD cycles by providing ECC(Error Correcting Code) with real time map-

ping-out algorithm. The K9LBG08U0D is an optimum solution for large nonvolatile storage applications such as solid state file stor-

age and other portable applications requiring non-volatility.

Samsung Confidential

3

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