NHI-15191RT データシートの表示（PDF） - Unspecified

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NHI-15191RT

Multi-Protocol Data Bus Interface NHi-RT Expanded Memory Remote Terminals

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Begin new message (i. e., end of a valid legal command for this Remote Terminal)

3.3.4.2 MANCHESTER ENCODER

The encoder receives 16 bit words and transmits them with the appropriate sync and parity as a

serial Manchester bi- phase signal. The outputs of the encoder can be loop- backed into either

decoder for test purposes.

3.3.4.3 GAP COUNTER

The gap counter checks contiguity of successive words. If the time between "contiguous" words

(measured from zero- cross of parity to zero- cross of sync) exceeds 3.5 - 3.7 microseconds, the

message is invalidated.

3.3.4.4 RT - RT NO RESPONSE COUNTER

The no response counter checks the response time of the transmitting RT in a RT to RT transfer.

If the response time is exceeded, the message is invalidated. The response time is software

programmable (14, 18, 26, 42 microseconds) to accommodate systems with long cables and/ or

slow terminals.

3.3.4.5 MINIMUM RESPONSE TIME COUNTER

The minimum response time counter ensures that the response will be no sooner than 4

microseconds

(measured from zero- cross of parity to zero- cross of sync).

3.3.4.6 FAIL -SAFE TIMEOUT COUNTER

This counter inhibits the encoder outputs and issues a TIMEOUT interrupt whenever continuous

transmission exceeds 768/ 672 microseconds. Transmission will remain inhibited until a

command is received on the same bus or the part is reset.

3.3.5

MESSAGE PROCESSOR UNIT

The MPU forms the heart of the protocol chip and controls the operation of the Decoders,

Encoders, and Interrupt Controller. This unit is activated by the reception of a valid legal

command addressed to the RT.

The MPU performs the following functions:

Recognizes the various message types for the RT and responds with the

appropriate sequence of control signals.

Validates format and timing of received data words.

Checks command legality.

Responds with status/ data.

Calculates all addresses for accessing the RAM and discrete I/ O.

Updates RAM data table contents, including tag words.

Optionally time tags data tables.

Issues interrupt requests to the ICU.

The maximum response time of the NHi- RT less than 6.0

microseconds (measured from zero- cross to zero- cross).

3.4.0

RT HARDWIRE TERMINAL ADDRESS

The terminal address of the NHi- RT can be hardwired using I/ O DAT( 5: 0). I/ O DAT( 4: 0) are

used for the terminal address, I/ O DAT0 being the LSB, and I/ O DAT5 is used to set odd parity

in the address. These pins CANNOT be directly connected to +5 or ground since the I/ O data

bus drives the NHi- RT's internal RAM.

-9-

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