74LVC16374ADGG データシートの表示（PDF） - NXP Semiconductors.
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74LVC16374ADGG Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
VI
nOE input
GND
VCC
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
tPLZ
tPZL
tPHZ
VX
VY
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
mna362
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
3-state enable and disable times
Table 8. Measurement points
Supply voltage Input
VCC
1.2 V
2.7 V
VI
VCC
2.7 V
3.0 V to 3.6 V
2.7 V
VM
0.5 × VCC
1.5 V
1.5 V
Output
VM
0.5 × VCC
1.5 V
1.5 V
VX
VOL + 0.1 V
VOL + 0.3 V
VOL + 0.3 V
VY
VOH − 0.1 V
VOH − 0.3 V
VOH − 0.3 V
74LVC_LVCH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 23 March 2010
© NXP B.V. 2010. All rights reserved.
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