11486-802 データシートの表示（PDF） - AMI Semiconductor
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11486-802 Datasheet PDF : 9 Pages
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FS6372
ROM-Based 3-PLL Clock Generator IC
1.0 Features
• Fully compatible with FS6370 (EEPROM-based) and
FS6377 (register-based) devices.
• Three on-chip PLLs with Reference and Feedback
Dividers set by internal ROM look-up table
• Four independently programmable muxes and post
dividers
• Selectable power-down of PLLs and shutdown of
output clock drivers
• Tristate outputs for board testing
• Can be optimized for reference clock (instead of
crystal) input
• 5V to 3.3V operation
• Commercial (FS6372) and industrial (FS6372i) tem-
perature ranges
2.0 Description
The FS6372 is a CMOS clock generator IC designed to
minimize cost and component count in a variety of elec-
tronic systems. Three phase-locked loops feeding four
muxes and post dividers provide a high degree of flexibil-
ity.
Figure 1: Pin Configuration
VSS 1
SELECT 2
PD 3
VSS 4
XIN 5
XOUT/REFIN 6
OE 7
VDD 8
16 VDD
15 CLK_A
14 VDD
13 CLK_B
12 CLK_C
11 VSS
10 CLK_D
9 n/c
16-pin (0.150”) SOIC
Figure 2: Block Diagram
XIN
XOUT
Reference
Oscillator
PLL A
Mux
Post
A
Divider A
CLK_A
PD
Power Down
Control
PLL B
Mux
Post
B
Divider B
CLK_B
SELECT
ROM
PLL C
Mux
Post
C
Divider C
Mux
D
Post
Divider D
CLK_C
CLK_D
OE
FS6372
IAmerican Microsystems, Inc., reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ISO9001
3.1.02
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