GM5060H データシートの表示（PDF） - Genesis Microchip

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GM5060H

GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS

Genesis Microchip 

Genesis Microchip

gm5060/gm5060-H Data Sheet

List Of Figures

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gm5060 System Design Example............................................................................. 2

gm5060 Pinout Diagram ........................................................................................... 5

gm5060 Functional Block Diagram ......................................................................... 12

TCLK connection (with Crystal Resonator) ............................................................. 13

TCLK parasitic capacitances .................................................................................. 14

TCLK connection (with Optional Resistor) .............................................................. 15

TCLK connection (with Oscillator)........................................................................... 15

Internal Clock Sources............................................................................................ 16

Hardware Reset...................................................................................................... 18

ADC Block .............................................................................................................. 19

Example Signal Terminations ................................................................................. 20

Positive and negative polarity OR-type CSYNC ..................................................... 21

Positive and negative polarity XOR-type CSYNC ................................................... 21

Positive and negative polarity serration-type CSYNC............................................. 22

Positive and negative polarity "serration with equalization”-type CSYNC ............... 22

gm5060 Clock Recovery......................................................................................... 23

Phase Adjustment Delay Curve .............................................................................. 24

DVI Block ................................................................................................................ 25

ITU-R BT656 Block................................................................................................. 27

Image Capture Block .............................................................................................. 28

Capture Window ..................................................................................................... 29

HSYNC Delay ......................................................................................................... 29

Active Data Crosses HSYNC Boundary ................................................................. 30

ITU-R BT656 Input.................................................................................................. 31

Image Measurement Block ..................................................................................... 32

ODD/EVEN Field Detection .................................................................................... 33

Pixel Grab ............................................................................................................... 35

Digital Color Control Blocks .................................................................................... 36

YUV Color Controls ................................................................................................ 36

Black / Contrast / Brightness Transfer Function...................................................... 38

Input LUT and Dithering.......................................................................................... 38

Frame Store Interface Blocks ................................................................................. 40

FRC Required Parameters ..................................................................................... 42

Scaling Block .......................................................................................................... 43

Gamma Correction LUT Block ................................................................................ 44

Gamma Response Curve ....................................................................................... 45

Display Timing and Control Blocks ......................................................................... 46

DDDS Block............................................................................................................ 46

Lock Event Timing (Frame Sync Mode).................................................................. 49

Display Windows and Timing.................................................................................. 50

Single / Double-wide Display Data.......................................................................... 50

Capture Only Mode................................................................................................. 51

FRC Bypass Mode.................................................................................................. 51

Scaler Bypass Mode............................................................................................... 52

February 2002

vii

C5060-DAT-01G

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