SSD1882T1R1 データシートの表示（PDF） - Solomon Systech

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SSD1882T1R1

240 Outputs MLA Row (Common) Driver

Solomon Systech  

7 PIN DESCRIPTION

VDD_ROW

VDD_ROW is the power supply pin to the logic system. The voltage range is 2.7V to 5.5V with

respect to the -V1 pin.

+V1, VC, -V1

+V1, VC and -V1 are power supply pins to the LCD driving system. -V1 pin also serves as the

logic ground of chip.

Their relationship is +V1 ≥ VC ≥ VDD_ROW ≥ -V1.

YD

This input pin is used as a signal to start a frame and to reset the column address for writing.

(Note 1)

LP

This is an input pin for display data latch clock. The display data is latched at the falling edge of

LP. (Note 1)

FR

This is an input pin and is used to change the LCD driving waveform polarity. If MLA power chip is

used, the output FR from the power chip should be connected to the FR pin of the row driver.

(Note 1)

F1, F2

These are input pins and are used as driver pattern select signals. These two signals are

generated by a column driver. If the display system is formed by the MLA column driver and the

MLA row driver, outputs F10 and F20 from the column driver should be connected to F1 and F2 of

the row driver respectively. (Note 1)

DOFF#

This is an input pin and is used to control the display. When it is set at “L” level, all common

outputs are forced to VC level and the LC display will be forced to blank, however, the contents of

the latches are maintained. In normal display operation, it is set to “H” level. (Note 1)

SEL

SSD1882 can be configured as 200 or 240 common outputs depending on the logic level of input

pin SEL.

When SEL is set at “L” level, 240 outputs are chosen and COM0 to COM239 will be used. When

SEL is set at “H” level, 200 outputs are chosen and only COM20 to COM219 will be used.

CIO1, CIO2

These are I/O pins and they can be configured as an input or an output by the signal SHL. When

SHL is set at “L” level, CIO1 is input and CIO2 is output. When SHL is set at “H” level, CIO1 is

output and CIO2 is input. The output transition occurs on the falling edge of LP. (Note 1)

SHL

This is an input pin and is used to select the output shift direction and to configure CIO1 and CIO2.

The following table shows the relationship between SEL, SHL, CIO1, CIO2 and the output shift

direction.

SOLOMON

8

Rev 1.4

01/2003

SSD1882

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