A3971SLB データシートの表示（PDF） - Allegro MicroSystems
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A3971SLB Datasheet PDF : 8 Pages
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3971
DUAL DMOS
FULL-BRIDGE DRIVER
PWMx
Sx0
X
0
0
0
0
1
0
1
1
0
1
1
1
1
Logic Truth Table
Sx1
OUTxA
OUTxB
0
Z
Z
1
L
H
0
H
L
1
L
L
1
L
L
1
L
L
0
L
L
Function
Disable
Forward
Reverse
Synchronous
Rectification/
Slow Decay
Chop
Terminal
1
2
3
4
5
6, 7
8
9
10
11
12
13
14
15
16
17
18, 19
20
21
22
23
24
Name
NC
LGND
S10
OUT1A
VBB1
GND
SENSE1
OUT1B
S11
PWM1
CP1
CP2
VCP
S21
OUT2B
SENSE2
GND
VBB2
OUT2A
S20
PWM2
VDD
Terminal List
Description
No (Internal) connection
Logic ground
Control input, bridge 1
Output A, bridge 1
Load supply voltage, bridge 1
Ground
Sense resistor, bridge 1
Output B, bridge 1
Control input, bridge 1
Control input, bridge 1
Charge-pump capacitor
Charge-pump capacitor
Reservoir capacitor
Control input, bridge 2
Output B, bridge 2
Sense resistor, bridge 2
Ground
Load supply voltage, bridge 2
Output A, bridge 2
Control input, bridge 2
Control input, bridge 2
Logic supply voltage
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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