74LVC821ADB(2004) データシートの表示（PDF） - Philips Electronics

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74LVC821ADB
(Rev.:2004)

10-bit D-type flip-flop with 5-volt tolerant inputs/outputs; positive-edge trigger (3-State)

Philips Electronics 

Philips Semiconductors

12. Waveforms

74LVC821A

10-bit D-type flip-flop with 5 V tolerant inputs/outputs

VI

CP input

GND

VOH

Qn output

VOL

1/fmax

VM

tW

t PHL

VM

t PLH

mna894

Fig 7.

Measurement points are given in Table 9.

VOL and VOH are the typical output voltage drop that occur with the output load.

Clock (CP) to output (Qn) propagation delays, the clock pulse width and the

maximum clock pulse frequency.

Table 9: Measurement points

Supply voltage

Input

VCC

< 2.7 V

≥ 2.7 V

VM

0.5 × VCC

1.5 V

Output

VM

0.5 × VCC

1.5 V

CP input

VI

GND

Dn input

VI

GND

VM

tsu

th

VM

tsu

th

Qn output

VOH

VOL

VM

mna202

Measurement points are given in Table 10.

VOL and VOH are the typical output voltage drop that occur with the output load.

The shaded areas indicate when the input is permitted to change for predicable output

performance.

Fig 8. Data set-up and hold times for the Dn input to the CP input.

9397 750 13276

Product data sheet

Rev. 03 — 11 May 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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