AM27C010-55PC データシートの表示（PDF） - Advanced Micro Devices

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AM27C010-55PC

1 Megabit (128 K x 8-Bit) CMOS EPROM

Advanced Micro Devices 

FUNCTIONAL DESCRIPTION

Erasing the Am27C010

In order to clear all locations of their programmed con-

tents, it is necessary to expose the Am27C010 to an

ultraviolet light source. A dosage of 15 W seconds/

cm2 is required to completely erase an Am27C010.

This dosage can be obtained by exposure to an ultra-

violet lamp — wavelength of 2537 Å — with intensity

of 12,000 µW/cm2 for 15 to 20 minutes. The

Am27C010 should be directly under and about one

inch from the source and all filters should be removed

from the UV light source prior to erasure.

It is important to note that the Am27C010, and similar

devices, will erase with light sources having wave-

lengths shorter than 4000 Å. Although erasure times

will be much longer than with UV sources at 2537Å, ex-

posure to fluorescent light and sunlight will eventually

erase the Am27C010 and exposure to them should be

prevented to realize maximum system reliability. If used

in such an environment, the package window should be

covered by an opaque label or substance.

Programming the Am27C010

Upon delivery, or after each erasure, the Am27C010

has all 1,048,576 bits in the “ONE”, or HIGH state.

“ZEROs” are loaded into the Am27C010 through the

procedure of programming.

The programming mode is entered when 12.75 V ± 0.25V

is applied to the VPP pin, CE and PGM are at VIL and OE

is at VIH.

For programming, the data to be programmed is

applied 8 bits in parallel to the data output pins.

The Flashrite algorithm reduces programming time by

using 100 µs programming pulse and by giving each

address only as many pulses as are necessary in order

to reliably program the data. After each pulse is applied

to a given address, the data in that address is verified.

If the data does not verify, additional pulses are given

until it verifies or the maximum is reached. This process

is repeated while sequencing through each address of

the Am27C010. This part of the algorithm is done at

VCC = 6.25 V to assure that each EPROM bit is pro-

grammed to a sufficiently high threshold voltage. After

the final address is completed, the entire EPROM

memory is verified at VCC = VPP = 5.25 V.

Please refer to Section 6 for programming flow chart

and characteristics.

Program Inhibit

Programming of multiple Am27C010s in parallel with

different data is also easily accomplished. Except for

CE, all like inputs of the parallel Am27C010 may be

common. A TTL low-level program pulse applied to an

Am27C010 CE input and VPP = 12.75 V ± 0.25 V, PGM

LOW, and OE HIGH will program that Am27C010. A

high-level CE input inhibits the other Am27C020s from

being programmed.

Program Verify

A verify should be performed on the programmed bits

to determine that they were correctly programmed. The

verify should be performed with OE and CE at VIL,

PGM at VIH, and VPP between 12.5 V and 13.0 V.

Auto Select Mode

The auto select mode allows the reading out of a binary

code from an EPROM that will identify its manufacturer

and type. This mode is intended for use by program-

ming equipment for the purpose of automatically

matching the device to be programmed with its corre-

sponding programming algorithm. This mode is func-

tional in the 25°C ± 5°C ambient temperature range

that is required when programming the Am27C010.

To activate this mode, the programming equipment

must force 12.0 V ± 0.5 V on address line A9 of the

Am27C010. Two identifier bytes may then be se-

quenced from the device outputs by toggling address

line A0 from VIL to VIH. All other address lines must be

held at VIL during auto select mode.

Byte 0 (A0 = VIL) represents the manufacturer code,

and byte 1 (A0 = VIH), the device identifier code. For the

Am27C010, these two identifier bytes are given in the

Mode Select Table. All identifiers for manufacturer and

device codes will possess odd parity, with the MSB

(DQ7) defined as the parity bit.

Read Mode

The Am27C010 has two control functions, both of

which must be logically satisfied in order to obtain data

at the outputs. Chip Enable (CE) is the power control

and should be used for device selection. Output Enable

(OE) is the output control and should be used to gate

data to the output pins, independent of device selec-

tion. Assuming that addresses are stable, address ac-

cess time (tACC) is equal to the delay from CE to output

(tCE). Data is available at the outputs tOE after the fall-

ing edge of OE, assuming that CE has been LOW and

addresses have been stable for at least tACC – tOE.

Standby Mode

The Am27C010 has a CMOS standby mode which re-

duces the maximum VCC current to 100 µA. It is placed

in CMOS-standby when CE is at VCC ± 0.3 V. The

Am27C010 also has a TTL-standby mode which re-

duces the maximum VCC current to 1.0 mA. It is placed

in TTL-standby when CE is at VIH. When in standby

mode, the outputs are in a high-impedance state, inde-

pendent of the OE input.

6

Am27C010

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