AS58C1001 データシートの表示（PDF） - Austin Semiconductor

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AS58C1001

128K x 8 EEPROM EEPROM Memory

Austin Semiconductor 

Austin Semiconductor, Inc.

EEPROM

AS58C1001

128K x 8 EEPROM

EEPROM Memory

PIN ASSIGNMENT

(Top View)

AVAILABLE AS MILITARY

SPECIFICATIONS

! SMD 5962-38267

32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ),

32-Pin SOP (DG)

! MIL-STD-883

RDY/BUSY\ 1

3 2 Vcc

A16 2

31 A15

End Of FEATURES

! High speed: 150, 200, and 250ns

! Data Retention: 10 Years

! Low power dissipation, active current (20mW/MHz (TYP)),

standby current (100µW(MAX))

! Single +5V (+10%) power supply

! Data Polling and Ready/Busy Signals

! Erase/Write Endurance (10,000 cycles in a page mode)

! Software Data protection Algorithm

! Data Protection Circuitry during power on/off

! Hardware Data Protection with RES pin

! Automatic Programming:

Automatic Page Write: 10ms (MAX)

128 Byte page size

OPTIONS

! Timing

150ns access

200ns access

250ns access

MARKINGS

-15

-20

-25

A14 3

3 0 RES\

A12 4

29 WE\

A7 5

28 A13

A6 6

27 A8

A5 7

26 A9

A4 8

25 A11

A3 9

24 OE\

A2 10

23 A10

A1 11

2 2 CE\

A0 12

2 1 I/O 7

I/O 0 1 3

2 0 I/O 6

I/O 1 1 4

1 9 I/O 5

I/O 2 1 5

1 8 I/O 4

Life Vss 16

1 7 I/O 3

32-Pin LCC (ECA)

4 3 2 1 32 31 30

A7 5

A6 6

A5 7

2 9 A14

28 A13

27 A8

! Packages

Ceramic LCC

ECA No. 208

Ceramic Flat Pack

F No. 306

Radiation Shielded Ceramic FP* SF No. 305

A4 8

A3 9

A2 10

A1 11

A0 12

I/O 0 1 3

26 A9

25 A11

24 OE\

23 A10

2 2 CE\

2 1 I/O 7

Ceramic SOJ

DCJ No. 508

Plastic SOP

DG

! Operating Temperature Ranges

14 15 16 17 18 19 20

-Military (-55oC to +125oC)

XT

-Industrial (-40oC to +85oC)

IT

*NOTE: Package lid is connected to ground (Vss).

This EEPROM provides several levels of data protection.

GENERAL DESCRIPTION

The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS

Electrically Erasable Programmable Read Only Memory (EEPROM)

organized as 131, 072 x 8 bits. The AS58C1001 is capable or in

system electrical Byte and Page reprogrammability.

The AS58C1001 achieves high speed access, low power

consumption, and a high level of reliability by employing advanced

MNOS memory technology and CMOS process and circuitry

Hardware data protection is provided with the RES pin, in addition to

noise protection on the WE signal and write inhibit during power on

and off. Software data protection is implemented using JEDEC

Optional Standard algorithm.

The AS58C1001 is designed for high reliability in the most

demanding applications. Data retention is specified for 10 years and

erase/write endurance is guaranteed to a minimum of 10,000 cycles in

the Page Mode.

technology and CMOS process and circuitry technology.

This device has a 128-Byte Page Programming function to make its

erase and write operations faster. The AS58C1001 features Data

Polling and a Ready/Busy signal to indicate completion of erase and

For more products and information

please visit our web site at

www.austinsemiconductor.com

programming operations.

AS58C1001

Rev. 5.0 7/02

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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