AS58C1001 データシートの表示（PDF） - Austin Semiconductor

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AS58C1001

128K x 8 EEPROM EEPROM Memory

Austin Semiconductor 

Austin Semiconductor, Inc.

EEPROM

AS58C1001

FUNCTIONAL DESCRIPTION

DATA PROTECTION

To protect the data during operation and power on/off, the

AUTOMATIC PAGE WRITE

AS58C1001 has:

The Page Write feature allows 1 to 128 Bytes of data to be

1. Data protection against Noise on Control Pins (CE\, OE\,

written into the EEPROM in a single cycle and allows the un- WE\) during Operation. During readout or standby, noise on

defined data within 128 Bytes to be written corresponding to the control pins may act as a trigger and turn the EEPROM to

the undefined address (A0 to A6). Loading the first Byte of

data, the data load window of 30µs opens for the second. In the

programming mode by mistake. To prevent this phenomenon,

the AS58C1001 has a noise cancellation function that cuts noise

End Of Life same manner each additional Byte of data can be loaded within

30µs. In case CE\ and WE\ are kept high for 100µs after data

input, the EEPROM enters erase and write automatically and

only the input data can be written into the EEPROM. In Page

mode the data can be written and accessed 104 times per page,

and in Byte mode 103 times per Byte.

if its width is 20ns or less in programming mode. Be careful not

to allow noise of a width of more than 20ns on the control pins.

DATA\ POLLING

Data\ Polling allows the status of the EEPROM to be deter-

mined. If the EEPROM is set to Read mode during a Write

cycle, and inversion of the last Byte of data to be loaded out-

puts from I/O, to indicate that the EEPROM is performing a

Write operation.

WRITE PROTECTION

(1) Noise protection: Noise on a write cycle will not act as

a trigger with a WE\ pulse of less than 20ns.

(2) Write inhibit: Holding OE\ low, WE\ high or CE\ high,

inhibits a write cycle during power on/off.

WE\ AND CE\ PIN OPERATION

During a write cycle, addresses are latched by the falling

edge of WE\ or CE\, and data is latched by the rising edge of

WE\ or CE\.

WRITE/ERASE ENDURANCE AND

DATA RETENTION

The endurance with page programming is 104 cycles (1%

cumulative failure rate) and the data retention time is more than

10 years when a device is programmed less than 104 cycles.

AS58C1001

Rev. 5.0 7/02

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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