CY3682(2004) データシートの表示（PDF） - Cypress Semiconductor
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CY3682 Datasheet PDF : 42 Pages
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FO R
FO R
CY7C68001
11.3.2 Slave FIFO Synchronous Write
IFCLK
tIFCLK
SLWR
tSWR
tWRH
DATA
N
tSFD tFDH
FLAGS
tXFLG
Figure 11-6. Slave FIFO Synchronous Write Timing Diagram[12]
Table 11-9. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK[13]
Parameter
Description
Min.
Max.
tIFCLK
tSWR
tWRH
tSFD
tFDH
tXFLG
IFCLK Period
SLWR to Clock Set-up Time
Clock to SLWR Hold Time
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
20.83
18.1
0
9.2
0
9.5
Table 11-10. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK[13]
Parameter
tIFCLK
tSWR
tWRH
tSFD
tFDH
tXFLG
Description
IFCLK Period
SLWR to Clock Set-up Time
Clock to SLWR Hold Time
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
Min.
20
12.1
3.6
3.2
4.5
Max.
13.5
Unit
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
Document #: 38-08013 Rev. *E
Page 27 of 42
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