D78046HGF データシートの表示（PDF） - NEC => Renesas Technology
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D78046HGF Datasheet PDF : 58 Pages
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µPD78044H, 78045H, 78046H
3.3 PIN I/O CIRCUITS AND PROCESSING OF UNUSED PINS
Table 3-1 shows the I/O circuit type of each pin and the processing of unused pins.
For the configuration of the I/O circuit of each type, see Fig. 3-1.
Pin
P00/INTP0/TI0
P01/INTP1
P02/INTP2
P03/INTP3
P04/XT1
P10/ANI0-P17/ANI7
P20/SI1
P21/SO1
P22/SCK1
P23
P24
P25
P26
P27
P30/TO0
P31/TO1
P32/TO2
P33
P34
P35/PCL
P36/BUZ
P37
P70-P74
P80/FIP0, P81/FIP1
P90/FIP2-P97/FIP9
P100/FIP10-P107/FIP17
P110/FIP18-P117/FIP25
P120/FIP26-P127/FIP33
RESET
XT2
AVREF
AVDD
AVSS
VLOAD
IC
Table 3-1 I/O Circuit Type
I/O circuit type
2
8-A
I/O
Input
I/O
Recommended connections when unused
Connected to VSS.
Individually connected to VSS with a resistor.
16
11
8-A
5-A
8-A
5-A
8-A
10-A
Input
I/O
Connected to VDD or VSS .
Individually connected to VDD or VSS with a resistor.
13-B
22-A
13-B
14-A
15-C
2
16
—
Output
Open
I/O
Individually connected to VDD or VSS with a resistor.
Input
—
—
Open
Connected to VSS.
Connected to VDD.
Connected to VSS.
Connected directly to VSS.
12
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