DG485 データシートの表示（PDF） - Vishay Semiconductors
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DG485 Datasheet PDF : 11 Pages
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DG485
Vishay Siliconix
APPLICATIONS
CLK
LD
tLOGIC
f
tLOGIC
DG485
IN1 RIN
IN2 RIN
C1
C2
R1
R2
–
+
f= for CLK and LD inputs of the same frequency.
The recommended phase delay of LD from CLK is
½ tLOGIC to tLOGIC:
tLOGIC(MIN): 80 ns at 25_C
150 ns at 125_C
V+ = 15 V
V– = –15 V
GND = 0 V
FIGURE 11.
VREF
DIN
DG485
CLK
R0
R1
R2
RF
R7
–
+
VOUT
FIGURE 12. Multi-Function Circuit Provides Input Selection,
Gain Ranging and Filtering with One DG485
FIGURE 13. Serial DAC Circuit
www.vishay.com S FaxBack 408-970-5600
5-10
Document Number: 70065
S-52433—Rev. E, 06-Sep-99
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