DG485 データシートの表示（PDF） - Vishay Semiconductors

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DG485

Octal Analog Switch Array

Vishay Semiconductors 

TIMING DIAGRAMS

CLOCK

DATA

50%

50%

tDH

tDS

FIGURE 4. Data Setup and Hold Time

DG485

Vishay Siliconix

CLOCK

RS

LOAD

tLH

tRH

FIGURE 5. Timing Relationships

RS

DIN

CLK

LD

S1

S2

S3

S4

S5

S6

S7

S8

DOUT

S1 – S8 and DOUT are expected output with the drain connected high. The sources require pull-down of 1 kW.

FIGURE 6.

tDRC

Document Number: 70065

S-52433—Rev. E, 06-Sep-99

www.vishay.com S FaxBack 408-970-5600

5-7

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