G-LINK
GLT41316
64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
June 1998 (Rev 2)
Truth Table: GLT41316
Function
Standby
Read: Word
RAS CAS UW LW
H H→X X
X
L
L
H
H
OE ADDRESS
DQs
X
High-Z
L ROW/COL Data Out
Note
s
Write: Word(Early Write)
L
L
L
L
X ROW/COL Data-In
Write: Lower Byte (Early)
L
Write: Upper Byte (Early)
L
Read Write
L
L
H
L
X ROW/COL Lower Byte,Data-In
Upper Byte,High-Z
L
L
H
X ROW/COL Lower Byte,High-Z
Upper Byte,Data-In
L H→L H→L L→H ROW/COL Data-Out,Data-In 1,2
Fast-Page- 1st Cycle
L
H→L H
H
L ROW/COL Data-Out
1
Mode Read 2nd Cycle
L
H→L
H
L
COL Data-Out
1
Fast-Page- 1st Cycle
L
H→L L
L
X ROW/COL Data-In
2
Mode Write 2nd Cycle
L
H→L L
L
X
COL Data-In
2
Fast-Page- 1st Cycle
Mode Read-
Write
2nd Cycle
L
H→L H→L H→L L→H ROW/COL Data-Out,Data-In
1,2
L
H→L H→L H→L L→H
COL Data-Out,Data-In
1,2
Hidden
Read
L→H→L L
H
H
L ROW/COL Data-Out
1
Refresh
Write
L→H→L L
L
L
X ROW/COL Data-In
2,3
RAS -Only Refresh
L
H
X
X
X
ROW High-Z
CBR Refresh
H→L
L
X
X
X
High-Z
Notes:
1. These READ cycles are always WORD READ cycles .
2. These WRITE cycles may also be BYTE READ cycles (either UW or LW active).
3. EARLY WRITE only.
G-Link Technology Corporation
2701Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
-4-
G-Link Technology Corporation, Taiwan
2F, No.12, R&D Rd. II, Science-Based Industrial Park,
Hsin Chu, Taiwan, R.O.C.