HB54A2568KN データシートの表示（PDF） - Elpida Memory, Inc
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HB54A2568KN Datasheet PDF : 16 Pages
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HB54A2568KN-A75B/B75B/10B
Byte No.
28
29
30
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Minimum row active to row active
delay (tRRD)
0 0 1 1 1 1 0 0 3C
Minimum /RAS to /CAS delay (tRCD) 0 1 0 1 0 0 0 0 50
Minimum active to precharge time
(tRAS)
-A75B/B75B
0 0 1 0 1 1 0 1 2D
-10B
0 0 1 1 0 0 1 0 32
31
Module bank density
0 0 1 0 0 0 0 0 20
Address and command setup time
32
before clock (tIS)
1 0 1 1 0 0 0 0 B0
-A75B/B75B
-10B
1 1 0 0 0 0 0 0 C0
Address and command hold time after
33
clock (tIH)
1 0 1 1 0 0 0 0 B0
-A75B/B75B
-10B
1 1 0 0 0 0 0 0 C0
Data input setup time before clock
34
(tDS)
0 1 0 1 0 0 0 0 50
-A75B/B75B
-10B
0 1 1 0 0 0 0 0 60
35
Data input hold time after clock (tDH)
-A75B/B75B
0
1
0
1
0
0
0
0
50
-10B
0 1 1 0 0 0 0 0 60
36 to 40 Superset information
0 0 0 0 0 0 0 0 00
41
Active command period (tRC)
-A75B/B75B
0 1 0 0 0 0 0 1 41
-10B
0 1 0 0 0 1 1 0 46
Auto refresh to active/
42
Auto refresh command cycle (tRFC) 0 1 0 0 1 0 1 1 4B
-A75B/B75B
-10B
0 1 0 1 0 0 0 0 50
43
SDRAM tCK cycle max. (tCK max.) 0 0 1 1 1 1 0 0 3C
44
Dout to DQS skew
-A75B/B75B
0 0 1 1 0 0 1 0 32
-10B
0 0 1 1 1 1 0 0 3C
45
Data hold skew (tQHS)
-A75B/B75B
0 1 1 1 0 1 0 1 75
-10B
1 0 1 0 0 0 0 0 A0
46 to 61 Superset information
0 0 0 0 0 0 0 0 00
62
SPD revision
0 0 0 0 0 0 0 0 00
Comments
15ns
20ns
45ns
50ns
1 bank/
2 bank
128 MB
1.1ns*5
1.2ns*5
1.1ns*5
1.2ns*5
0.5ns*5
0.6ns*5
0.5ns*5
0.6ns*5
Future use
65ns*5
70ns*5
75ns*5
80ns*5
15ns*5
500ps*5
600ps*5
750ps*5
1000ps*5
Future use
Initial
Preliminary Data Sheet E0148H20 (Ver. 2.0)
6
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