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HEF4093B(2015) データシートの表示(PDF) - NXP Semiconductors.

部品番号
コンポーネント説明
メーカー
HEF4093B
(Rev.:2015)
NXP
NXP Semiconductors. NXP
HEF4093B Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Nexperia
12. Waveforms
HEF4093B
Quad 2-input NAND Schmitt trigger
9,
LQSXW
9 
WU

90
W3+/
92+
RXWSXW
92/

90

W7+/
WI
W3/+
W7/+
DDJ
Fig 4.
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
tr, tf = input rise and fall times.
Propagation delay and output transition time
Table 9. Measurement points
Supply voltage
VDD
5 V to 15 V
Input
VM
0.5VDD
Output
VM
0.5VDD
9''
9,
*
92
'87
57
&/
DDJ
Fig 5.
Test data given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
20 ns
Load
CL
50 pF
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 15 December 2015
© Nexperia B.V. 2017. All rights reserved
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