HYB5116405BT-600 データシートの表示（PDF） - Siemens AG

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HYB5116405BT-600

4M x 4-Bit Dynamic RAM 2k & 4k Refresh (Hyper Page Mode- EDO)

Siemens AG 

HYB5116(7)405BJ/BT-50/-60/-70

4M x 4-EDO DRAM

DC Characteristics( note : values in brackets for HYB 5117405 BJ/BT)

TA = 0 to 70 °C, VSS = 0 V, VCC = 5 V ± 10 %; tT = 2 ns

Parameter

Symbol Limit Values

min.

max.

Unit Test

Condition

Average VCC supply current,

ICC4

during hyper page mode: -50 ns version

–

-60 ns version

–

-70 ns version

–

(RAS = VIL, CAS, address cycling:tPC = tPC min.)

Standby VCC supply current

(RAS = CAS = VCC – 0.2 V)

ICC5

–

Average VCC supply current, during CAS-

ICC6

before-RAS refresh mode: -50 ns version

–

-60 ns version

–

-70 ns version

–

(RAS, CAS cycling: tRC = tRC min.)

Average Self Refresh Current

ICC7

_

70 (70) mA 2) 3) 4)

55 (55) mA 2) 3) 4)

45 (45) mA 2) 3) 4)

1

mA 1)

100(120) mA 2) 4)

90 (110) mA 2) 4)

80 (100) mA 2) 4)

1

mA

(CBR cycle with tRAS>TRASSmin., CAS held low,

WE=Vcc-0.2V, Address and Din=Vcc - 0.2V or 0.2V)

Capacitance

TA = 0 to 70 °C,VCC = 5 V ± 10 %, f = 1 MHz

Parameter

Input capacitance (A0 to A10,A11)

Input capacitance (RAS, CAS, WE, OE)

I/O capacitance (I/O1-I/O4)

Symbol

CI1

CI2

CIO

Limit Values

min.

max.

–

5

–

7

–

7

Unit

pF

pF

pF

Semiconductor Group

7

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