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9173B-01CS08LF データシートの表示(PDF) - Integrated Device Technology

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9173B-01CS08LF
IDT
Integrated Device Technology IDT
9173B-01CS08LF Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
VIDEO GENLOCK PLL
DATASHEET
IDT9173B
Description
The IDT9173B provide the analog PLL circuit blocks to
implement a frequency multiplier. Because the device is
configured to use an external divider in the PLL clock
feedback path, a large divider can be used to result in a
large frequency multiplication ratio. This is useful when
using a low frequency input clock to generate a high
frequency output clock. The IDT9173B contains a phase
detector, charge pump, loop filter, and voltage-controlled
oscillator (VCO). The ICS674-01 can be used as the
external feedback divider.
A common application of the IDT9173B is the
implementation of a video genlock circuit. Because of this,
the IDT9173B inputs operate on the negative-going clock
edge.
The IDT9173B is pin and function compatible to the
AV9173-01/15.
Features
Phase-detector/VCO circuit block
Ideal for genlock system
Reference clock range 12 kHz to 1 MHz for full output
clock range
Output clock range of 1.25 to 75 MHz (-01), and 0.625 to
37.5 MHz (-15). See “Allowable Input Frequency to
Output Frequency” table for conditions
On-chip loop filter
Single 5 V power supply
Low power CMOS technology
8-pin SOIC package
Block Diagram
IDT™ VIDEO GENLOCK PLL
1
IDT9173B
REV B 111209

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