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L3916AN データシートの表示(PDF) - STMicroelectronics

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L3916AN Datasheet PDF : 15 Pages
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L3916A - L3926A - L3936A
FUNCTION PIN DESCRIPTION (continued)
IREF
Pin 13. An external resistor of 3.6kOhm con-
nected between IREF and GND will set the inter-
nal current level. Any change of this resistor value
will influence the microphone gain, DTMF gain,
earphone gain and sidetone.
VCC
Pin 14, VCC is the positive supply of the speech
network. It is stabilized by a decoupling capacitor
between VCC and GND. The VCC supply voltage
may also be used to supply external peripheral
circuits.
LED
Pin 15. Lighted dial indicator. The LED connected
to this pin will light up when the telephone is off-
hook and consuming 25% of the line current.
ILI NE
Pin 16. A recommended external resistor of
20ohm is connected between ILINE and GND.
Changing this resistor value will have influence on
microphone gain, DTMF gain, sidetone, maximum
output swing on LN and on the DC characteristics
(especially in the low voltage region).
LN
Pin 17. LN is the positive line terminal of the de-
vice.
REG
Pin 18. The internal voltage regulator has to be
decoupled by a capacitor from REG to GND. The
DC characteristics can be changed with an exter-
nal resistor connected between LN and REG or
between REG and ILINE .
GTX, MIC–, MIC+
GTX (pin 19), MIC– (pin 20) and MIC+ (pin 21).
The one chip phone has symmetrical microphone
inputs. The amplification from microphone inputs to
LN is 51.5dB and it can be adjusted between 43.5
and 51.5dB. The amplification is proportional to ex-
ternal resistor connected between GTX and REG.
GDTMF
Pin 22. When the DTMF input is enabled, the mi-
crophone inputs and the receive amplifier input will
be muted and the dialing tone will be sent to the
line. The voltage amplification from GDTMF to LN
4/15
is 40dB. Final ouput level on LN can be adjusted
via the external resistor connected between
GDTMF and GND through a decoupling capaci-
tor. A confidence tone is sent to the earphone
during tone dialing. The attenuation of the confi-
dence tone from LN to Vear is –32dB typically.
VDD
Pin 23. VDD is the positive supply for the dialing
network and must meet the maximum and mini-
mum voltage requirements.
DEVICE OPERATION
During on-hook all keypad inputs are high imped-
ance internally and it requires very low current for
memory retention. At anytime, Row and Column
inputs assume opposite states at off-hook. The
circuit verifies that a valid key has been entered
by alternately scanning the Row and Column in-
puts. If the input is still valid following 32ms of de-
bounce, the digit is stored into memory, and dial-
ing begins after a pre-signal delay of
approximately 40ms (measured from the initial
key closure). Output tone duration is shown in Ta-
ble 1.
The device allows manual dialing of an indefinite
number of digits, but if more than 32 digits are di-
aled, it will ”wrap around”. That is, the extra digits
beyond 32 will be stored at the beginning of LND
buffer, and the first 32 digits will no longer be
available for redial.
Table 2: DTMF Output Frequency
Key Input
ROW 1
ROW 2
ROW 3
ROW 4
COL 1
COL 2
COL 3
Stadard
Frequency
697
770
852
941
1209
1336
1477
Actual
Frequency
% Deviation
699.1
766.2
847.4
948.0
+0.31
–0.49
–0.54
+0.74
1215.9
1331.7
1471.9
+0.57
–0.32
–0.35
NORMAL DIALING
D1
D2
D3 ....etc
Normal dialing is straighforward, all keyboard en-
tries will be stored in the buffer and signaled in
succession.
PROGRAMMING AND REPERTORY DIALING
To program, enter the following:
PROG D1 D2 D3. . . Dn MEM (Location 0-9)
or
PROG D1 D2. . . .Dn E1-E3
During programming, dialing is inhibited.

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