MAX1005 データシートの表示（PDF） - Maxim Integrated
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MAX1005 Datasheet PDF : 8 Pages
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IF Undersampler
ABSOLUTE MAXIMUM RATINGS
VCCA to AGND ........................................................-0.3V, +6.0V
VCCD to DGND ........................................................-0.3V, +6.0V
VCCA to VCCD ...................................................................±6.3V
Digital I/O Pins (D0–D6, CLK, RXEN, TXEN)
to DGND .................................-0.3V to (VCCD + 0.3V) or 6.0V
Analog I/O Pins (AIO+, AIO-)
(whichever is smaller)
to AGND................................(VCCA - 1.5V) to (VCCA + 0.3V)
AGND to DGND........................................................-0.3V, +0.3V
Power Dissipation (TA = +70°C)
QSOP (derate 5.90mW/°C above 70°C) ......................470mW
Operating Temperature Ranges
MAX1005CEE .....................................................0°C to +70°C
MAX1005EEE...................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, <10sec)...........................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCCA = VCCD = 3.0V, fCLK = 15MHz, RL = ∞, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TRANSMIT DAC DC ACCURACY (Note 1)
Resolution
N
7
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
Offset Error
Transmit Full-Scale Output Voltage VOUT
736
TRANSMIT DAC DYNAMIC PERFORMANCE (TA = +25°C) (Note 2)
Spurious-Free Dynamic Range
SFDR (Note 3)
VCCA = VCCD = 3.0V
28
VCCA = VCCD = 2.7V to 5.5V
Total Harmonic Distortion plus
Noise
THD+N (Note 4)
VCCA = VCCD = 3.0V
Wakeup Time Exiting Shutdown
Clock Feedthrough
tWAKE
(Note 5)
DAC Latency
(Notes 6, 7)
Power-Supply Rejection
PSR
VCC_ (A or D or both) = 3.0V ±100mVp-p at
100kHz
TRANSMIT ADC DC ACCURACY (Note 8)
Resolution
N
5
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
Offset Error
AIO+ = AIO-
Full-Scale Input Range
VIN
368
RECEIVE ADC DYNAMIC PERFORMANCE (TA = +25°C) (Note 8)
Total Harmonic Distortion
THD
VCCA = VCCD = 3.0V
(Notes 9, 10)
VCCA = VCCD = 2.7V to 5.5V
Spurious-Free Dynamic Range
SFDR (Note 9)
VCCA = VCCD = 3.0V
24
VCCA = VCCD = 2.7V to 5.5V
Effective Number of Bits
ENOB (Note 9)
VCCA = VCCD = 3.0V
4.5
VCCA = VCCD = 2.7V to 5.5V
TYP
±0.2
±0.2
800
39
39
0.7
-50
67
±0.2
±0.2
±2
400
-42
-42
44
44
4.9
4.9
MAX UNITS
Bits
±1
LSB
±1
LSB
±1
LSB
864 mVp-p
dBc
-28
dBc
2.4
µs
dBc
0.5
CLK
period
dB
Bits
LSB
LSB
LSB
432
mV
-24
dB
dB
Bits
2 _______________________________________________________________________________________
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