MAX3509(2000) データシートの表示（PDF） - Maxim Integrated

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MAX3509
(Rev.:2000)

Upstream CATV Amplifier

Maxim Integrated 

Upstream CATV Amplifier

Typical Operating Characteristics (continued)

(MAX3509 EV kit, VCC1 = VCC2 = +9V, VIN = +34dBmV, TXEN = SHDN = high, D7 = 1, fINPUT = 10MHz, ZLOAD = 75Ω through a 1:1

transformer, TA = +25°C, unless otherwise noted.)

QPSK OUTPUT SPECTRUM

-20

-30

VOUT = 66dBmV

160 ks/s

-40 α = 0.25

-50

-60

-70

-80

-90

-100

-110

CENTER 22MHz

-120

100kHz/div

SPAN 1MHz

OUTPUT SPECTRUM

-30

-40

VOUT = 66dBmV

1280 ks/s

-50

α = 0.25

-60

-70

-80

-90

-100

-110

-120

START 15MHz

-130

5.5MHz/div

STOP 70MHz

PIN NAME

1

TXEN

2

SHDN

3, 8

VCC1

4, 7 GND1

5

IN+

6

9–13

IN-

GND

14,17 VCC2

15

16

18

19

20

Exposed

Paddle

OUT-

OUT+

CS

SDA

SCLK

GND2

Pin Description

FUNCTION

Transmit Enable. To disable the MAX3509 and provide high input/output isolation, drive TXEN low. Drive

TXEN high for normal operation.

Shutdown. To enable low-power shutdown, drive SHDN low. Drive SHDN high for normal operation.

Programmable-Gain Amplifier (PGA) +9V Supply. Bypass to GND1 with a 0.1µF decoupling capacitor as

close to the part as possible.

PGA Ground. Connect to ground with a low inductance path.

Noninverting PGA Input. Along with IN-, this port forms a high-impedance differential input to the PGA.

Driving this port differentially increases the rejection of second-order distortion at low output levels.

Inverted PGA Input. When not used, AC-coupled to ground. See IN+.

Ground

Power Amplifier Bias +9V Supply. Bypass to GND2 (exposed paddle) with a 0.1µF decoupling capacitor as

close to the part as possible.

Inverted Output. AC-couple to output transformer. Used in conjunction with OUT+.

Noninverted Output. See OUT-.

Serial-Interface Enable. TTL-compatible input. See Serial Interface.

Serial-Interface Data. TTL-compatible input. See Serial Interface.

Serial-Interface Clock. TTL-compatible input. See Serial Interface.

Power Amplifier Bias Ground. Connect to ground with a low inductance path. Ensure a low thermal resistive

path to PC board. See Layout Issues.

6 _______________________________________________________________________________________

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