MAX3940E データシートの表示（PDF） - Maxim Integrated
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MAX3940E Datasheet PDF : 13 Pages
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DATA+/CLK+
DATA-/CLK-
10Gbps EAM Driver with Integrated
Bias Network
GND
50Ω
50Ω
MAX3940
GND GND
50Ω
50Ω
GND
MAX3940
50Ω
GND
OUT
VEE
VEE
Figure 7. Simplified Input Circuit
Chip Topography/
Pad Configuration
The origin for pad coordinates is defined as the bottom
left corner of the bottom left pad. All pad locations are
referenced from the origin and indicate the center of
the pad where the bond wire should be connected.
Refer to Maxim application note HFAN-08.0.1:
Understanding Bonding Coordinates and Physical Die
Size for detailed information.
Maxim characterized this circuit with gold wire (1-mil
diameter wire) ball bonded to the pads. Die pad size is
4 mils (102µm) square, and die thickness is 8 mils
(203µm).
Figure 8. Simplified Output Circuit
Chip Information
TRANSISTOR COUNT: 2084
PROCESS: SiGe BIPOLAR
SUBSTRATE: SOI
DIE THICKNESS: 8 mils
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