MAX4613CSE データシートの表示（PDF） - Maxim Integrated

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MAX4613CSE

Quad, SPST Analog Switch

Maxim Integrated 

Quad, SPST Analog Switch

LOGIC +3V

INPUT

0V

SWITCH

OUTPUT

0V

tf < 20ns

50%

tr < 20ns

tOFF

VOUT

0.8 x VOUT

0.8 x VOUT

tON

LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

+5V

+15V

SWITCH

INPUT

VL

D_

V+

S_

IN_

LOGIC

GND

V-

INPUT

+3V

-15V

REPEAT TEST FOR CHANNELS 2, 3, AND 4.

CL INCLUDES FIXTURE AND STRAY CAPACITANCE.

MAX4613

RL

VOUT

CL

( ) RL

VOUT = VD

RL + RDS(ON)

Figure 2. Switching Time

Timing Diagrams/Test Circuits

LOGIC +3V

INPUT

50%

0V

VD

VO1

0.9VO

SWITCH

OUTPUT

0V

VD

VO2

0.9VO

SWITCH 0V

OUTPUT

tD

tD

+5V

+15V

VD = 10V

VD = 10V

LOGIC

INPUT

VL

D_

D_

IN_

GND

V+

MAX4613

S_

VO1

S_

VO2

RL1

CL1

RL2

V-

CL2

0V

-15V

RL = 1000Ω

CL = 35pF

CL INCLUDES FIXTURE AND STRAY CAPACITANCE. LOGIC 0 INPUT.

Figure 3. Break-Before-Make Test Circuit

____________________Revision History

Pages changed at Rev 3: 1, 9, 10

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