MAX5071 データシートの表示（PDF） - Maxim Integrated
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MAX5071 Datasheet PDF : 22 Pages
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High-Performance, Single-Ended, Current-Mode
PWM Controllers
Pin Descriptions (continued)
MAX5071A/MAX5071B/MAX5071C
PIN
MAX5071A/ MAX5071C
MAX5071B
1
1
2
—
NAME
FUNCTION
COMP
SYNC
COMP is level-shifted and connected to the inverting input of the PWM comparator. Pull
up COMP to VREF through a resistor and connect an optocoupler from COMP to GND for
proper operation.
Bidirectional Synchronization Input. When synchronizing with other
MAX5071A/MAX5071Bs, the higher frequency part synchronizes all other devices.
ADV_CLK is an 85ns clock output pulse preceding the rising edge of OUT (see Figure 4).
—
2
ADV_CLK Use the pulse to drive the secondary-side synchronous rectifiers through a pulse
transformer or an optocoupler (see Figure 8).
3
3
CS
Input to the PWM Comparator and Overcurrent Protection Comparator. The current-
sense signal is compared to the voltage at COMP.
4
4
RT/CT
Timing Resistor and Capacitor Connection. A resistor RT from RT/CT to VREF and
capacitor CT from RT/CT to GND set the oscillator frequency.
5
5
GND
Power-Supply Ground. Place the VCC and VREF bypass capacitors close to the IC to
minimize ground loops.
6
6
OUT MOSFET Driver Output. OUT connects to the gate of the external n-channel MOSFET.
7
7
VCC
Power-Supply Input for MAX5071. Bypass VCC to GND with a 0.1µF ceramic capacitor or
a parallel combination of a 0.1µF and a higher value ceramic capacitor.
8
8
VREF
5V Reference Output. Bypass VREF to GND with a 0.1µF ceramic capacitor or a parallel
combination of a 0.1µF and a higher value ceramic capacitor.
10 ______________________________________________________________________________________
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