MAX5096 データシートの表示（PDF） - Maxim Integrated

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MAX5096

40V, 600mA Buck Converters with Low Quiescent-Current Linear Regulator Mode

Maxim Integrated 

MAX5096/MAX5097

40V, 600mA Buck Converters with Low-

Quiescent-Current Linear Regulator Mode

Detailed Description

The MAX5096/MAX5097 are easy-to-use, high-efficiency,

PWM current-mode, step-down switching converters

in normal operation. The MAX5096/MAX5097 have an

internal high-side p-channel 0.9Ω switch and use a low

forward-drop freewheeling diode for rectification. In buck

mode, the p-channel switches at the 135kHz or 330kHz

frequency. Buck mode uses a current-mode control archi-

tecture that offers excellent line-transient response, eas-

ier frequency compensation, and cycle-by-cycle current

limiting. The buck converter is compensated externally

for a selected value/type of output inductor and capacitor.

The internal p-channel switch acts as a pass element

when operating in the low-quiescent-current LDO mode.

The LDO mode can be selected on the fly through the

LDO/BUCK input. During the key-off condition, the sys-

tem’s microcontroller drives the LDO/BUCK input high

and forces the MAX5096/MAX5097 into LDO mode,

reducing the quiescent current to 1μA (typ). When in LDO

mode, the device is capable of delivering up to 100mA,

which may be limited by the device power dissipation. The

LDO and switcher share the same pass element and the

reference; however, the error amplifiers are different with

their own compensation schemes.

The MAX5096/MAX5097 include an integrated micro-

processor reset circuit with an adjustable reset timeout

period. The internal reset circuit monitors the regulator

output voltage and asserts RESET low when the regulator

output falls below the reset threshold voltage. Other fea-

tures include an enable input, externally programmable

soft-start, optimized current-limit protection in both LDO

and buck modes, and thermal shutdown.

Enable Input (EN)

EN is a logic-level enable input that turns the device on

or off. The logic-high and logic-low voltages for the EN

input are 1.4V and 0.4V, respectively. Drive EN high to

turn on the device, and drive it low to place the device in

shutdown. Leaving EN unconnected disables the device

since the EN is internally pulled low with a 0.5μA current,

however, a forced pulldown of EN improves the noise

immunity. The MAX5096/MAX5097 draw 6μA (typ) of sup-

ply current when in shutdown. EN withstands up to +40V,

allowing EN to be connected directly to IN for always-on

operation. The converter may be turned on and off while

in both buck and LDO modes. Each time the EN is tog-

gled, the output rises with a programmed soft-start period.

Internal Regulator (BP)/Undervoltage Lockout

The MAX5096/MAX5097 include an internal 4V auxiliary

regulator to power internal circuitry. Bypass the auxiliary

regulator output (BP) to SGND with a 1μF ceramic capaci-

tor physically located close to the device. The regulator

is not intended to supply the external circuit other than

pulling up the LDO/BUCK input or RESET. Do not load

BP externally by more than 2mA. The regulator output

is regulated to 4V with 7% accuracy during steady state.

During turn-on, the BP voltage stabilizes after 250μs with

a 1μF capacitor at BP. Drive EN high to turn on the inter-

nal regulator. The internal UVLO with hysteresis ensures

stable operation, resulting in the monotonic rise of the

output voltage. The UVLO circuit monitors the output of

the regulator. The rising UVLO threshold is internally set

to 3.65V (BP rising) with a 185mV hysteresis (BP falling).

The 3.65V UVLO at the no-load BP output guarantees

operation at VIN lower than 4V.

Soft-Start (SS)

Soft-start provides for the monotonic, glitch-free turn-

on of the converter. Soft-start limits the input inrush

current which may cause a glitch, especially if the source

impedance is high. The soft-start period required also

depends on the output capacitance and the closed-loop

bandwidth of converter. The soft-start period for the

MAX5096/MAX5097 is externally programmable using a

single capacitor (CSS). The soft-start is achieved by the

controlled ramping up of the error amplifier reference

input. At startup, after VIN is applied and the UVLO

threshold is reached, the device enters soft-start. During

soft-start, 5μA is sourced into the capacitor (CSS) con-

nected from SS to SGND (Figure 2) causing the reference

voltage to ramp up slowly. When VSS reaches 1.237V, the

output becomes fully active. Set the soft-start time (tSS)

using following equation:

= t SS

VSS

ISS

×

C SS

where VSS is 1.237V, ISS is 5μA, tSS is in seconds, and

CSS is in Farads.

Pulling EN low quickly discharges the CSS capacitor,

making it ready for the next soft-start period.

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