MAX5418PETA-T データシートの表示（PDF） - Maxim Integrated

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MAX5418PETA-T

256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers

Maxim Integrated 

256-Tap, Nonvolatile, I2C-Interface,

Digital Potentiometers

Pin Description

PIN

NAME

FUNCTION

1

VDD Power-Supply Input. 2.7V to 5.25V voltage range. Bypass with a 0.1µF capacitor from VDD to GND.

2

SCL I2C-Interface Clock Input

3

SDA I2C-Interface Data Input

4

A0 Address Input. Sets the A0 bit in the device ID address.

5

GND Ground

6

L

Low Terminal

7

W

Wiper Terminal

8

H

High Terminal

—

EP

Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal

performance. Not intended as an electrical point.

SDA

tSU-DAT

tLOW

SCL

tHD-STA

tHIGH

tR

tF

S

PARAMETERS ARE MEASURED FROM 30% TO 70%.

tHD-DAT

tSU-STA

tHD-STA

Sr

A

tR

tF

tBUF

tSU-STO

P

S

Figure 1. I2C Serial-Interface Timing Diagram

VDD

IOL = 3mA

SDA

VOUT

400pF

IOH = 0mA

Figure 2. Load Circuit

Detailed Description

The MAX5417/MAX5418/MAX5419 contain a resistor

array with 255 resistive elements. The MAX5417 has a

total end-to-end resistance of 50kΩ, the MAX5418 has

an end-to-end resistance of 100kΩ, and the MAX5419

has an end-to-end resistance of 200kΩ. The

MAX5417/MAX5418/MAX5419 allow access to the high,

low, and wiper terminals for a standard voltage-divider

configuration. H, L, and W can be connected in any

desired configuration as long as their voltages fall

between GND and VDD.

A simple 2-wire I2C-compatible serial interface moves

the wiper among the 256 tap points. A nonvolatile mem-

ory stores the wiper position and recalls the stored wiper

position in the nonvolatile memory upon power-up. The

nonvolatile memory is guaranteed for 50 years for wiper

data retention and up to 200,000 wiper store cycles.

8 _______________________________________________________________________________________

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