MAX7033 データシートの表示（PDF） - Maxim Integrated
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MAX7033 Datasheet PDF : 16 Pages
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MAX7033
315MHz/433MHz ASK Superheterodyne
Receiver with AGC Lock
Pin Description (continued)
PIN
TSSOP TQFN
28
28
—
1, 13,
21, 25
—
—
NAME
XTAL2
N.C.
EP
FUNCTION
Crystal Input 2. Can also be driven with an external reference oscillator (see the Crystal
Oscillator section).
No Connection
Exposed Pad (TQFN Only). Connect EP to GND.
Functional Diagram
LNASRC
4
AC LNAOUT MIXIN1 MIXIN2
15
6
8
9
IRSEL
11
MIXOUT
12
IFIN1 IFIN2
17 18
28-PIN TSSOP
PACKAGE
LNAIN 3
AVDD 2
VDD5 24
AVDD 7
DVDD 14
DGND 13
AGND 5, 10
AUTOMATIC
LNA
GAIN
CONTROL
3.2V REG
0˚
Q
IMAGE ∑
REJECTION
90˚
I
MAX7033
IF LIMITING
AMPS
RSSI
DIVIDE
BY 64
VCO
PHASE
DETECTOR
LOOP
FILTER
÷1
÷2
CRYSTAL
DRIVER
16
XTALSEL
1 28
XTAL1 XTAL2
POWER-
DOWN
DATA
SLICER
27
25
SHDN DATAOUT
20 23 19
DSN DSP DFO
DATA
FILTER
RDF2
RDF1
100kΩ
100kΩ
26
21
PDOUT OPP
22
DFFB
Detailed Description
The MAX7033 CMOS superheterodyne receiver and a few
external components provide the complete receive chain
from the antenna to the digital output data. Depending on
signal power and component selection, data rates as high
as 33kbps Manchester (66kbps NRZ) can be achieved.
The MAX7033 is designed to receive binary ASK data
modulated in the 300MHz to 450MHz frequency range.
ASK modulation uses a difference in amplitude of the car-
rier to represent logic 0 and logic 1 data.
Voltage Regulator
For operation with a single +3.0V to +3.6V supply voltage,
connect AVDD, DVDD, and VDD5 to the supply voltage.
For operation with a single +4.5V to +5.5V supply voltage,
connect VDD5 to the supply voltage. An on-chip voltage
regulator drives one of the AVDD pins to approximately
+3.2V. For proper operation, DVDD and both the AVDD
pins must be connected together. Bypass VDD5, DVDD,
and the pin 7 AVDD pin to AGND with 0.01μF capacitors,
and the pin 2 AVDD pin to AGND with a 0.1μF capacitor,
all placed as close as possible to the pins.
Low-Noise Amplifier
The LNA is an nMOS cascode amplifier with off-chip
inductive degeneration, with a 3.0dB noise figure and an
IIP3 of -12dBm. The gain and noise figures are dependent
on both the antenna matching network at the LNA input
and the LC tank network between the LNA output and the
mixer inputs.
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