89C1632 データシートの表示（PDF） - MAXWELL TECHNOLOGIES

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89C1632

16 Megabit (512K x 32-Bit) MCM SRAM

MAXWELL TECHNOLOGIES 

16 Megabit (512K x 32-Bit) MCM SRAM

FIGURE 1. AC TEST LOADS

89C1632

FIGURE 2. TIMING WAVEFORM OF READ CYCLE (1) (ADDRESS CONTROLLED)

FIGURE 3. TIMING WAVEFORM OF READ CYCLE (2) (WE = VIH)

1. WE is high for read cycle.

2. All read cycle timing is referenced from the last valid address to the first transition address.

1000558

12.20.01 Rev 1

All data sheets are subject to change without notice 7

©2001 Maxwell Technologies.

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