MT3270BE1 データシートの表示（PDF） - Zarlink Semiconductor Inc

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MT3270BE1

Wide Dynamic Range DTMF Receiver

Zarlink Semiconductor Inc 

MT3170B/71B, MT3270B/71B, MT3370B/71B

Wide Dynamic Range DTMF Receiver

Data Sheet

Features

• Wide dynamic range (50 dB) DTMF Receiver

• Call progress (CP) detection via cadence

indication

• 4-bit synchronous serial data output

• Software controlled guard time for MT3x70B

• Internal guard time circuitry for MT3x71B

• Powerdown option (MT317xB & MT337xB)

• 4.194304 MHz crystal or ceramic resonator

(MT337xB and MT327xB)

• External clock input (MT317xB)

• Guarantees non-detection of spurious tones

Applications

• Integrated telephone answering machine

• End-to-end signalling

• Fax Machines

August 2005

Ordering Information

MT3170/71BE

8 Pin PDIP

MT3270/71BE

8 Pin PDIP

MT3370/71BS

18 Pin SOIC

MT3370/71BN

20 Pin SSOP

MT3370/71BSR

18 Pin SOIC

MT3371BNR

20 Pin SSOP

MT3270/71BE1

8 Pin PDIP*

MT3171BE1

8 Pin PDIP*

MT3170BE1

8 Pin PDIP**

MT3370/BN1

20 Pin SSOP*

MT3370/71BS1

18 Pin SOIC*

MT3370/71BSR1

18 Pin SOIC*

*Pb Free Matte Tin

**Pb Free Tin/Silver/Copper

Tubes

Tubes

Tubes

Tubes

Tape & Reel

Tape & Reel

Tubes

Tubes

Tubes

Tubes

Tubes

Tape & Reel

-40°C to 85°C

➀

PWDN

VDD

VSS

INPUT

Voltage

Bias Circuit

AGC

Anti-

alias

Filter

Dial

Tone

Filter

➁

OSC2

OSC1

(CLK)

Oscillator

and

Clock

Circuit

To All Chip Clocks

➀ MT3170B/71B and MT337xB only.

➁ MT3270B/71B and MT337xB only.

➂ MT3x71B only.

High

Group

Filter

Low

Group

Filter

Steering

Circuit

Digital

Detector

Algorithm

Code

Converter

and

Latch

Energy

Detection

Figure 1 - Functional Block Diagram

Digital

Guard

Time➂

Parallel to

Serial

Converter

& Latch

Mux

1

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Copyright 1995-2005, Zarlink Semiconductor Inc. All Rights Reserved.

ESt

or

DStD

ACK

SD

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