MC10H145P データシートの表示（PDF） - Motorola => Freescale

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MC10H145P

16 x 4 Bit Register File (RAM)

Motorola => Freescale 

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

16 x 4 Bit Register File (RAM)

The MC10H145 is a 16 x 4 bit register file. The active-low chip select allows

easy expansion.

The operating mode of the register file is controlled by the WE input. When

WE is “low” the device is in the write mode, the outputs are “low” and the data

present at Dn input is stored at the selected address, when WE is “high,” the

device is in the read mode — the data state at the selected location is present

at the Qn outputs.

• Address Access Time, 4.5 ns Typical

• Power Dissipation, 700 mW Typical

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

• Voltage Compensated

• MECL 10K-Compatible

MAXIMUM RATINGS

Characteristic

Symbol

Rating

Unit

Power Supply (VCC = 0)

Input Voltage (VCC = 0)

Output Current — Continuous

— Surge

VEE

VI

Iout

–8.0 to 0

Vdc

0 to VEE

Vdc

50

mA

100

Operating Temperature Range

Storage Temperature Range — Plastic

— Ceramic

TA

0 to +75

°C

Tstg

–55 to +150

°C

–55 to +165

ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)

Characteristic

0°

25°

75°

Symbol

Unit

Min Max Min Max Min Max

Power Supply Current

IE

— 160 — 163 — 165 mA

Input Current High

IinH

— 375 — 220 —

220 µA

Input Current Low

IinL

0.5 — 0.5 — 0.3

—

µA

High Output Voltage

VOH –1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc

Low Output Voltage

VOL –1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc

High Input Voltage

VIH –1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc

Low Input Voltage

VIL –1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,

after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed

circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through

a 50-ohm resistor to –2.0 volts.

MC10H145

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

TRUTH TABLE

MODE

INPUT

OUTPUT

CS WE Dn Qn

Write “0” L L L

L

Write “1” L L H

L

Read

L HX

Q

Disabled H X X

L

Q-State of Addressed Cell

DIP

PIN ASSIGNMENT

Q1

1

Q0

2

CS

3

D1

4

D0

5

A3

6

A2

7

VEE

8

16

VCC

15

Q2

14

Q3

13

WE

12

D3

11

D2

10

A0

9

A1

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

3/93

© Motorola, Inc. 1996

2–233

REV 5

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