MT47H128 データシートの表示（PDF） - Micron Technology

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MT47H128

1Gb: x4, x8, x16 DDR2 SDRAM

Micron Technology 

1Gb: x4, x8, x16 DDR2 SDRAM

Features

Figure 51: READ-to-PRECHARGE – BL = 4 ...................................................................................................... 97

Figure 52: READ-to-PRECHARGE – BL = 8 ...................................................................................................... 97

Figure 53: Bank Read – Without Auto Precharge .............................................................................................. 99

Figure 54: Bank Read – with Auto Precharge .................................................................................................. 100

Figure 55: x4, x8 Data Output Timing – tDQSQ, tQH, and Data Valid Window .................................................. 101

Figure 56: x16 Data Output Timing – tDQSQ, tQH, and Data Valid Window ..................................................... 102

Figure 57: Data Output Timing – tAC and tDQSCK ......................................................................................... 103

Figure 58: Write Burst ................................................................................................................................... 105

Figure 59: Consecutive WRITE-to-WRITE ...................................................................................................... 106

Figure 60: Nonconsecutive WRITE-to-WRITE ................................................................................................ 106

Figure 61: WRITE Interrupted by WRITE ....................................................................................................... 107

Figure 62: WRITE-to-READ ........................................................................................................................... 108

Figure 63: WRITE-to-PRECHARGE ................................................................................................................ 109

Figure 64: Bank Write – Without Auto Precharge ............................................................................................ 110

Figure 65: Bank Write – with Auto Precharge .................................................................................................. 111

Figure 66: WRITE – DM Operation ................................................................................................................ 112

Figure 67: Data Input Timing ........................................................................................................................ 113

Figure 68: Refresh Mode ............................................................................................................................... 114

Figure 69: Self Refresh .................................................................................................................................. 116

Figure 70: Power-Down ................................................................................................................................ 118

Figure 71: READ-to-Power-Down or Self Refresh Entry .................................................................................. 120

Figure 72: READ with Auto Precharge-to-Power-Down or Self Refresh Entry ................................................... 120

Figure 73: WRITE-to-Power-Down or Self Refresh Entry ................................................................................. 121

Figure 74: WRITE with Auto Precharge-to-Power-Down or Self Refresh Entry .................................................. 121

Figure 75: REFRESH Command-to-Power-Down Entry .................................................................................. 122

Figure 76: ACTIVATE Command-to-Power-Down Entry ................................................................................. 122

Figure 77: PRECHARGE Command-to-Power-Down Entry ............................................................................. 123

Figure 78: LOAD MODE Command-to-Power-Down Entry ............................................................................. 123

Figure 79: Input Clock Frequency Change During Precharge Power-Down Mode ............................................ 124

Figure 80: RESET Function ........................................................................................................................... 126

Figure 81: ODT Timing for Entering and Exiting Power-Down Mode ............................................................... 128

Figure 82: Timing for MRS Command to ODT Update Delay .......................................................................... 129

Figure 83: ODT Timing for Active or Fast-Exit Power-Down Mode .................................................................. 129

Figure 84: ODT Timing for Slow-Exit or Precharge Power-Down Modes .......................................................... 130

Figure 85: ODT Turn-Off Timings When Entering Power-Down Mode ............................................................ 130

Figure 86: ODT Turn-On Timing When Entering Power-Down Mode .............................................................. 131

Figure 87: ODT Turn-Off Timing When Exiting Power-Down Mode ................................................................ 132

Figure 88: ODT Turn-On Timing When Exiting Power-Down Mode ................................................................. 133

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. AA 07/14 EN

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