MT46V128M4 データシートの表示（PDF） - Micron Technology
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MT46V128M4 Datasheet PDF : 91 Pages
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State Diagram
Figure 2: Simplified State Diagram
512Mb: x4, x8, x16 DDR SDRAM
State Diagram
Power
applied
Power
on
PRE
Precharge
all banks
LMR
REFS
Self
refresh
MR
EMR
LMR
Idle
all banks
precharged
REFSX
REFA
CKEL
CKEH
Auto
refresh
Active
power-
down
ACT
CKE HIGH
Precharge
power-
down
WRITE
CKE LOW
Row
active
Burst
stop
WRITE
READ
BST
Write
WRITE A
READ A
READ
Read
READ
WRITE A
Write A
PRE
READ A
PRE
PRE
PRE
Precharge
PREALL
READ A
Read A
Automatic sequence
Command sequence
ACT = ACTIVE
BST = BURST TERMINATE
CKEH = Exit power-down
CKEL = Enter power-down
EMR = Extended mode register
LMR = LOAD MODE REGISTER
MR = Mode register
PRE = PRECHARGE
PREALL = PRECHARGE all banks
READ A = READ with auto precharge
REFA = AUTO REFRESH
REFS = Enter self refresh
REFSX = Exit self refresh
WRITE A = WRITE with auto precharge
Note:
This diagram represents operations within a single bank only and does not capture concur-
rent operations in other banks.
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core1.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
4
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©2000 Micron Technology, Inc. All rights reserved.
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