MSM80C86A-10GS データシートの表示（PDF） - Oki Electric Industry
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MSM80C86A-10GS Datasheet PDF : 37 Pages
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¡ Semiconductor
MSM80C86A-10RS/GS/JS
Timing Responses
Parameter
5 MHz Spec.
8 MHz Spec.
10 MHz Spec.
Symbol VCC = 4.5 V to 5.5 V VCC = 4.75 V to 5.25 V VCC = 4.75 V to 5.25 V Unit
Ta = -40 to +85°C Ta = 0 to +70°C Ta = 0 to +70°C
Min. Max. Min. Max. Min. Max.
Address Valid Delay
tCLAV
10
110
10
60
10
60 ns
Address Hold Time
tCLAX
10
—
10
—
10
— ns
Address Float Delay
tCLAZ
tCLAX
80
tCLAX
50
tCLAX
50 ns
ALE Width
tLHLL tCLCH-20 — tCLCH-10 — tCLCH-10 — ns
ALE Active Delay
tCLLH
—
80
—
50
—
40 ns
ALE Inactive Delay
tCHLL
—
85
—
55
—
45 ns
Address Hold Time to ALE Inactive tLLAX tCLCH-10 — tCLCH-10 — tCLCH-10 — ns
Data Valid Delay
tCLDV
10
110
10
60
10
60 ns
Data Hold Time
tCHDX
10
—
10
—
10
— ns
Data Hold Time after WR
tWHDX tCLCH-30 — tCLCH-30 — tCLCH-25 — ns
Control Active Delay 1
tCVCTV
10
110
10
70
10
55 ns
Control Active Delay 2
tCHCTV
10
110
10
60
10
50 ns
Control Inactive Delay
tCVCTX
10
110
10
70
10
55 ns
Address Float to RD Active
RD Active Delay
tAZRL
tCLRL
0
—
0
—
0
10
165
10
100
10
— ns
70 ns
RD Inactive Delay
tCLRH
10
150
10
80
10
60 ns
RD Inactive to Next Address Active tRHAV tCLC-45 — tCLCH-40 — tCLCL-35 — ns
HLDA Valid Delay
tCLHAV
10
160
10
100
10
60 ns
RD Width
tRLRH 2tCLCL-75 — 2tCLCL-50 — 2tCLCL-40 — ns
WR Width
tWLWH 2tCLCL-60 — 2tCLCL-40 — 2tCLCL-35 — ns
Address Valid to ALE Low
tAVAL tCLCH-60 — tCLCH-40 — tCLCH-35 — ns
Ouput Rise Time (From 0.8 V to 2.0 V) tOLOH
—
15
—
15
—
15 ns
Output Fall Time (From 2.0 V to 0.8 V) tOHOL
—
15
—
15
—
15 ns
Notes: 1. Signal at MSM82C84A-2 or MSM82C88-2 are shown for reference only.
2. Setup requirement for asynchronous signal only to guarantee recognition at next
CLK.
3. Applies only to T2 state. (8 ns into T3)
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